The core area of a conventional CMOS digital gate
array consists of only one size of NMOS device and one
size of PMOS device. Both primitives have fixed minimum
channel lengths, and this has significantly impeded analog
applications. This work has shown that by forming series
and parallel interconnections between...
The new CMOS folded source-coupled logic (FSCL)
technique intended for mixed-mode integrated circuits has
been designed. It has advantages over conventional CMOS
circuit in terms of reduced current spike, circuit delay,
logic flexibility, and layout density. A simple CPU
implemented in 2 μm CMOS technology with a 5.0 volt supply...
The design and implementation of Switched-Current (SI) ladder filters is
described. SI filters require only a standard digital CMOS process and the power
supply voltage requirement is low. SI circuits also can be potentially operated at
higher frequencies than Switched-Capacitor (SC) filters due to the low-impedance
wideband nodes of the...
With increasing interest in current-mode analogue processing due to its high
performance properties such as speed, bandwidth and accuracy compared to voltage-mode
processing, new current-mode alternatives to various conventional circuit designs are
appearing. In this report, a novel circuit design to construct a fully-differential current-mode
operational amplifier ( OP-AMP )...
Computers using the tagged-token dataflow model are among the best candidates for delivering extremely high levels of performance required in the future. Instruction scheduling in these computers is determined by associatively matching data-bearing tokens in a Waiting-Matching Unit (W-M unit). At the W-M unit, incoming tokens with matching contexts are...
Clock-feedthrough effects, channel-length modulation and device mismatch are
the main causes of the inaccuracy of Switched-Current (SI) circuits. In this paper, these
non-ideal effects are analyzed. A high-performance current mirror, namely regulated
cascode current mirror, which eliminates drain voltage variation problem is introduced.
By using this current mirror as a...
A series of complex digital blocks have been designed and fabricated using the newly
developed current-mode differential CMOS logic family viz. the Folded Source-Coupled
Logic ( FSCL ). The main feature of this logic family is the low current spikes generated
during the switching transitions ( at least 2 orders...
With advancements in CMOS technology, high speed analog circuits that were
traditionally implemented with discrete circuit components can now be made monolithically.
Antialiasing filters for video signals as well as signal conditioning filters in high
speed communication channels are examples of applications where high frequency integrated
circuits are now feasible....
With the advancement of technology, submicron CMOSonly process is available now for
Application Specific Integrated Circuits (ASICs). The high integration leads to the need for
high pin counts. However voltage supply and ground bounce due to many output drivers
switching at the same time is becoming a major problem. In...