A comparison and analysis of jitter for five different architectures of ring oscillators using a novel simulation technique developed by Professor Forbes' group is presented. Ring oscillators have become an essential building block in many digital and synchronous communications system due to their integrated nature and are widely used in...
With advancements in CMOS technology, high speed analog circuits that were
traditionally implemented with discrete circuit components can now be made monolithically.
Antialiasing filters for video signals as well as signal conditioning filters in high
speed communication channels are examples of applications where high frequency integrated
circuits are now feasible....
In recent years, there has been an extensive effort to develop low-cost implementations
of radio frequency integrated circuits for consumer applications. This thesis is a
research effort in the design and implementation of integrated RF CMOS Power Amplifiers
(PAs). A significant challenge in the implementation of RF CMOS ICs is...
A scalable macromodel for substrate noise coupling in lightly doped substrates with and without a buried layer has been developed. This model is based on Z-parameters and is scalable with contact size and separation. This model requires process dependent parameters that can be extracted easily from a small number of...
The design of two 2.4GHz CMOS LC balanced oscillators in the 0.25μm National BiCMOS process for Bluetooth specifications is presented. These oscillators achieve low phase noise with low power consumption. At a frequency offset of 500KHz from the 2.11GHz carrier, the measured phase noise is -101.9dBc/Hz for the NMOS oscillator...
Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design high-speed building blocks which dissipate the lowest possible power, and to ac- complish this with the cheapest technology. The dual-modulus prescaler is one of the...
There is a large and growing market for portable consumer audio products
with very small size. As the size of these products is reduced, the area occupied
by batteries becomes significant and hence limits the number of batteries to one.
In order to build such small products, high levels of...
High-accuracy and high-speed CMOS track-and-hold (T/H) or sample-and-hold (S/H) circuits are an important part of the analog-to-digital interface. The switched-capacitor (SC) circuits usually contain one or more op-amps whose dc offset, finite gain, finite bandwidth have a big impact on the accuracy of the track-and-hold circuit. Basic correlated double sampling...
Full integration of CMOS low noise amplifiers (LNA) presents a challenge for low
cost CMOS receiver systems. A critical problem faced in the design of an RF CMOS LNA
is the inaccurate high-frequency noise model of the MOSFET implemented in circuit
simulators such as SPICE. Silicon-based monolithic inductors are another...
The core area of a conventional CMOS digital gate
array consists of only one size of NMOS device and one
size of PMOS device. Both primitives have fixed minimum
channel lengths, and this has significantly impeded analog
applications. This work has shown that by forming series
and parallel interconnections between...