The distortions of input voltage and current waveforms generated by switch mode power supply (SMPS) operation are a major cause of concern in the power quality performance of commercial office buildings. These distortions are usually evaluated by performing a site survey of the building. In this thesis, a power quality...
A new comprehensive wide-band compact modeling methodology for single-ended spiral inductors and differential spiral inductors is presented. The new modeling methodology creates an equivalent circuit model consisting of frequency-independent circuit elements for use in circuit simulators. A fast automated extraction procedure is developed for determining the circuit element values from...
Complex digital circuits such as microprocessors typically require support circuitry that has traditionally been realized using analog or mixed-signal macros. PLL circuits are used in many integrated applications such as frequency synthesizers and inter-chip communication interfaces. As process technologies advance and grow in complexity, the challenge of maintaining required analog...
As Moore’s Law continues to give rise to ever shrinking channel lengths, circuits are becoming more digital and ever increasingly faster. Generating high frequency clocks in such scaled processes is becoming a tough challenge. Digital phase locked loops (DPLLs) are being explored as an alternative to conventional analog PLLs but...
There is a significant need in recent mobile communication and wireless broadband
systems for high-performance analog-to-digital converters (ADCs) that have wide
bandwidth (BW>5-MHz) and high data rate (>100-Mbps). A delta-sigma ADC is
recognized as a power-efficient ADC architecture when high resolution (>12-b) is
required. This is due to several advantages...
Dual referencing has been garnering a lot of attention in the power integrity community, specifically in the voltage mode driver application because it shows a lower overall power delivery noise (PDN) compared to other signal referencing types. Additionally, the increasing push to drive down package and board manufacturing costs is...
Supply noise is one of the major considerations in almost all analog building blocks. In the past, adequate supply rejection is usually achieved with circuit isolation or excess capacitive coupling. However, this brute force method requires large silicon area and degrades feedback bandwidth. In this study, a method of enhancing...
Phase-Locked Loops (PLLs) are essential building blocks in many communication systems. Designing high performance analog PLLs in the presence of technology imposed constraints such as leakage, poor analog transistor behavior, process variability, and low supply voltage is a challenging task. To overcome these drawbacks, digital PLLs (DPLLs) have recently emerged...
Various applications like wireless UWB communication, fast data acquisition systems and digital storage oscilloscopes needs ADCs with instantaneous input signal bandwidth from 0.1-40 GigaHertz range with 6-10 bits of resolution -- a challenging task and an impressive goal to achieve. Flash ADCs have been conventionally employed to achieve these goals...