A negatively biased substrate has several advantages over a grounded substrate in CMOS
technology. The on-chip generation of this negative substrate bias has made chips easier
to use when only a single supply is preferred. This project demonstrates two types of
charge pump circuits used to generate negative voltages not...
All-digital PLLs promise flexible and precise frequency modulation continous-wave(FMCW) radar signal signal for 77GHz radar applications. Such PLLs require digitally-controlled oscillators(DCO) with wide frequency tuning range and high resolution to address a range of applications and low phase noise requirements. In this thesis, novel resonator structures with ne capacitance/inductance switching...
With increasing interest in current-mode analogue processing due to its high
performance properties such as speed, bandwidth and accuracy compared to voltage-mode
processing, new current-mode alternatives to various conventional circuit designs are
appearing. In this report, a novel circuit design to construct a fully-differential current-mode
operational amplifier ( OP-AMP )...
This thesis describes the analysis and comparison of Folded Source-Coupled
Logic (FSCL) with standard static CMOS, cascode voltage-switch logic and differential
split-level logic gates. The advantages of FSCL are low switching noise and
high operating speed. The effect of voltage and device scaling on these topologies is
evaluated in terms...
Substrate switching noise is becoming a concern as integrated circuits get larger and speeds get faster. Mixed-mode integrated circuits are especially affected as the substrate noise interferes with sensitive analog circuits resulting in limited signal to noise ratios. This thesis serves to study the cause of the noise at the...
In this thesis, novel design techniques have been proposed for implementing high-linearity SC circuits in a standard digital CMOS process. They use nonlinear MOSFET capacitors instead of linear double-poly capacitors. To reduce their nonlinearities, a bias voltage is applied to keep MOSFET capacitors in their accumulation regions. For further reduction...
Currently, the two most critical factors of microprocessor design are performance and power. The optimum balance of these two factors is reflected in the speed-power product(SPP). 32-bit CMOS adders are used as representative circuits to investigate a method of
reducing the SPP. The purpose of this thesis is to show...
Advancements in the sophistication and complexity of modern electronic systems are creating a need for highly integrated systems with ever higher operational frequencies. The economical demands of these systems dictate that they be implemented using low cost fabrication technologies, such as digital CMOS. One of the major challenges facing circuit...