This thesis presents a continuous time bandpass delta sigma modulator with frequency translation inside the delta sigma loop. The input IF signal is down converted to baseband after amplification by a low Q, wideband bandpass resonator. The down converted IF signal is digitized by a continuous time, second order lowpass...
Nowadays, needs for wideband and high accuracy analog-to-digital converter are increasing rapidly in manifold applications such as wireless communication, digital video and other consumer electronics. Besides, low power consumption is required to have longer battery life in portable systems. CMOS technology scaling and innovative modulator topology make the implementation much...
Delta-sigma modulators are currently a very popular technique for making high-resolution
analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).
These oversampled data converters have several advantages over conventional Nyquist-rate
converters, including an insensitivity to many analog component imperfections, a
simpler antialiasing filter and reduced accuracy requirements in the sample and hold....
Delta-sigma analog-to-digital converters traditionally have been used for low speed, high resolution applications such as measurements, sensors, voice and audio systems. Through continued device scaling in CMOS technology and architectural and circuit level design innovations, they have even become popular for wideband, high dynamic range applications such as wired and...
There is a significant need in recent mobile communication and wireless broadband
systems for high-performance analog-to-digital converters (ADCs) that have wide
bandwidth (BW>5-MHz) and high data rate (>100-Mbps). A delta-sigma ADC is
recognized as a power-efficient ADC architecture when high resolution (>12-b) is
required. This is due to several advantages...
Time-domain data conversion has recently drawn increased research attention for its highly digital nature in favor of process technology scaling. Also, as the time information being carried by binary voltage, time-domain operation is much less sensitive to voltage noise compared to conventional voltage domain operation. However, for analog-to-digital converter (ADC)...
This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...