<?xml version="1.0" encoding="UTF-8"?>
<rdf:RDF xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns="http://purl.org/rss/1.0/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#">
<channel rdf:about="http://hdl.handle.net/1957/8163">
<title>Theses (Electrical Engineering and Computer Science)</title>
<link>http://hdl.handle.net/1957/8163</link>
<description/>
<items>
<rdf:Seq>
<rdf:li rdf:resource="http://hdl.handle.net/1957/38709"/>
<rdf:li rdf:resource="http://hdl.handle.net/1957/38561"/>
<rdf:li rdf:resource="http://hdl.handle.net/1957/38548"/>
<rdf:li rdf:resource="http://hdl.handle.net/1957/38547"/>
</rdf:Seq>
</items>
<dc:date>2013-05-24T12:18:46Z</dc:date>
</channel>
<item rdf:about="http://hdl.handle.net/1957/38709">
<title>Linearizing techniques for voltage controlled oscillator based analog to digital converters</title>
<link>http://hdl.handle.net/1957/38709</link>
<description>Linearizing techniques for voltage controlled oscillator based analog to digital converters
Rao, Sachin B.
Voltage controlled oscillator (VCO) based ADC is an important class of time-domain ADC that has gained widespread acceptance due to their several desirable properties. VCO-based ADCs behave like an open-loop continuous time ΔΣ modulator and achieve excellent resolution by first order noise shaping the quantization error. However, the SNDR of an open-loop VCO-based ADC is severely distortion limited by the voltage-to-frequency tuning characteristics of the VCO. This work examines various techniques that have already been proposed to overcome the VCO tuning non-linearity problem. Two new VCO-based ADC architectures, that overcome the limitations of the conventional approaches, are proposed. In the first approach, the ADC is linearized by forcing the VCO to operate at only two operating points using a front-end two level modulator. With this technique, the linearity is improved without using either a multi-bit feedback DAC or calibration. Fabricated in a 90 nm CMOS process, the prototype ADC achieves better than 71 dB SFDR and 59.1 dB SNDR in 8 MHz signal bandwidth while consuming&#13;
4.3 mW power. The ADC achieves a figure of merit of 366 fJ/conv-step, which is&#13;
comparable with other state of the art time based ADCs. In the second approach,&#13;
the need for a front-end two level modulator is obviated using linearizers, which introduce an inverse of VCO’s voltage to frequency characteristics in the signal path. A deterministic digital calibration unit runs continuously in the background and builds the inverse voltage to frequency transfer function. Implemented in a 90nm CMOS process, this on-chip calibration improves SFDR of the prototype ADC from 46 dB to more than 83 dB. The ADC consumes 4.1 mW power and achieves 73.9 dB SNDR in 5 MHz signal bandwidth resulting in an excellent figure of merit of 101 fJ/conv-step.
Graduation date: 2013; Access restricted to the OSU Community at author's request from May 22, 2013 - May 22, 2015
</description>
<dc:date>2013-05-13T00:00:00Z</dc:date>
</item>
<item rdf:about="http://hdl.handle.net/1957/38561">
<title>Helping end-user programmers help themselves : the idea garden approach</title>
<link>http://hdl.handle.net/1957/38561</link>
<description>Helping end-user programmers help themselves : the idea garden approach
Cao, Chen
End-user programmers face many barriers in programming. Research has seen many programming environments that attempted to lower or remove the barriers but despite these efforts, empirical studies continue to report barriers users face. To investigate this issue, we took a theory-informed approach. Using theories from design, creativity, and problem solving as a lens, we examined end-user programmers' programming obstacles to derive design implications. Synthesizing the implications, we proposed an Idea Garden approach for creating problem-solving support in existing end-user programming environments aimed at helping users help themselves. This approach focuses on delivering problem-solving strategies and programming knowledge in the context of users' work to help them overcome barriers. We developed a proof-of-concept prototype of an Idea Garden for the CoScripter environment. Results from empirical studies of the prototype were encouraging: not only was the Idea Garden able to help users overcome barriers, learn relevant programming and strategies, but such learning persisted with users so that they were able to apply it toward problem-solving new tasks without further help from the Idea Garden. We conclude by providing recommendations to researchers who are interested in developing an Idea Garden for their end-user programming environments.
Graduation date: 2013
</description>
<dc:date>2013-04-24T00:00:00Z</dc:date>
</item>
<item rdf:about="http://hdl.handle.net/1957/38548">
<title>Improved stability in ACTFEL devices</title>
<link>http://hdl.handle.net/1957/38548</link>
<description>Improved stability in ACTFEL devices
Khormaei, Iranpour
The stability of ZnS:Mn AC thin film Electroluminescence (ACEFEL)&#13;
devices as demonstrated by the brightness-voltage (BV)&#13;
characteristics is discussed. Two procedures for improvement of the&#13;
stability are demonstrated. The first method is the addition of a&#13;
CaS buffer layer to one or both interfaces of the ZnS active phosphor&#13;
layer. The second method for improving the stability involves a&#13;
vacuum anneal followed by an oxygen exposure. The oxygen exposure is&#13;
accomplished by heat treatment of the ZnS surface in air or an oxygen&#13;
plasma prior to the deposition of the second insulator.&#13;
A model for the observed instability is proposed in which&#13;
accumulation of positive charge near the ZnS insulator interfaces&#13;
gives rise to the observed increase in the BV threshold voltage with&#13;
aging for the control sample. The positive interface charge is&#13;
attributed to sulfur vacancies which are positively ionized donors.&#13;
The improved device stability is attributed to a reduction in the&#13;
sulfur vacancy concentration in the ZnS concomitant with the addition&#13;
of a CaS buffer layer or oxygen exposure of the ZnS surface.
Graduation date: 1990
</description>
<dc:date>1989-06-23T00:00:00Z</dc:date>
</item>
<item rdf:about="http://hdl.handle.net/1957/38547">
<title>A time-multiplexed switched-capacitor circuit for neural network applications</title>
<link>http://hdl.handle.net/1957/38547</link>
<description>A time-multiplexed switched-capacitor circuit for neural network applications
Hansen, James Edward, 1962-
Analog computation in the form of neural networks is currently&#13;
receiving much attention. Existing algorithms cannot be easily&#13;
implemented in hardware because of the large number of neurons needed&#13;
and the number of connections necessary between them. These problems&#13;
have motivated development of alternatives to a conventional&#13;
implementation. Hence, a time-multiplexed switched-capacitor&#13;
computational block with some neural network characteristics has been&#13;
developed. The goal of this work is not to exactly model biological&#13;
neuron qualities but rather to emulate their primary characteristics to the&#13;
extent necessary to solve some types of problems not suited to digital&#13;
processing.
Graduation date: 1990
</description>
<dc:date>1989-06-30T00:00:00Z</dc:date>
</item>
</rdf:RDF>
