Graduate Thesis Or Dissertation
 

Design of a variable gain, high linearity, low power baseband filter for WLAN transmitters

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/5h73pz38h

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  • A variable gain, high linearity, low power baseband filter for WLAN applications is implemented in a 1.5 V 3 V 0.15 μm CMOS process. This fourth-order low-pass filter, which is introduced in the transmit channel as a reconstruction filter between the D/A converter and the mixer, has a measured cut-off frequency of 9 MHz. The active-RC configuration has single amplifier biquads (SABs) to save power and is implemented using three-stage opamps with nested-Miller compensation for better linearity. It also features a special π-to-Tee transformation network for the resistor arrays, used for frequency or gain trimming, in order to obtain higher linearity than conventional Sallen-Key circuits. The measured THD for a 2 V [subscript p-p] signal at 1 MHz is -72 dB.
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