Graduate Thesis Or Dissertation

 

A feasibility study on the use of arithmetic-memory registers in the design of digital computer systems Public Deposited

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/gb19f9688

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  • The concept of combining arithmetic and memory capability on a single semiconductor chip has become practical from a system's viewpoint through the decreased cost of semiconductor memories and high circuit densities achieved through large scale integration. This paper describes a model for studying the feasibility of such systems. An arithmetic-memory register is defined as the basic hardware unit. A model consisting of instruction states and transition states is developed. The model is then applied to both past and contemporary computer structures. A general purpose machine is formulated from a set of arithmetic-memory registers. The feasibility of this structure is studied with respect to both performance and implementation. The utilization of arithmetic-memory registers is also shown to be applicable to special-purpose systems. A system designed to compute power spectra is described. The state model proved to be a useful technique in the design of the system. Cost estimates and measures of performance were significant factors influencing the feasibility of the system. The structure was also found suitable for real-time application.
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