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Filtering by: Creator Lamb, C. C. Remove constraint Creator: Lamb, C. C. Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science

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  • Lamb Wave Mode Decomposition and Its Applications in Structural Health Monitoring

    Creator:
    Zoubi, Ahmad Bassil
    Abstract:
    Structural health monitoring (SHM) systems perform automated non-destructive damage detection and characterization for a variety of large structures including civil structures such as bridges and aerospace structures such as aircrafts and space vehicles. The goals of SHM include preventing catastrophic structural failures, increasing reliability, reducing maintenance costs, and increasing the...
    Resource Type:
    Dissertation
    Full Text:
    . Title: Lamb Wave Mode Decomposition and Its Applications in Structural Health Monitoring Abstract

  • Exploratory Study to Uncover Student Mental Models of Singly Linked Lists in the C Programming Language

    Creator:
    Almadhoun, Eman
    Abstract:
    In computer science, learning abstract fundamental programming concepts requiring students to understand memory management can be very difficult and lead to misunderstandings that carry on into advanced topics. This is especially true in data structures with abstract data types. Understanding how novice students think and reason about data structures is...
    Resource Type:
    Dissertation
    Full Text:
    : Exploratory Study to Uncover Student Mental Models of Singly Linked Lists in the C Programming Language

  • A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications

    Creator:
    Xiao, Ying
    Abstract:
    A novel switched-R-MOSFET-C input branch is proposed for low-voltage and high-linearity applications. The tunability is achieved by varying the clock duty cycle using an automatic tuning circuit. This tuning method does not involve a change in gate voltage, and is therefore particularly suitable for low-voltage applications. The advantages of the...
    Resource Type:
    Masters Thesis
    Full Text:
    , 2004 . Title: A Tunable Duty-Cycle-Controlled Switched-R-MOSFET-C CMOS Filter for Low-Voltage and

  • Low-power high-linearity digital-to-analog converters

    Creator:
    Kuo, Ming-Hung
    Abstract:
    In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog converter (DAC) is presented. The segmented DAC uses switched-capacitor configuration to implement 8 (LSB) + 6 (MSB) segmented architecture to achieve high performance for minimum area. The implemented LSB DAC is based on quasi-passive pipelined DAC that has been...
    Resource Type:
    Masters Thesis
    Full Text:
    C. Temes In this thesis work, a design of 14-bit, 20MS/s segmented digital-to-analog

  • Low-power high-resolution delta-sigma ADC design techniques

    Creator:
    Wang, Tao
    Abstract:
    This dissertation presents a low-power high-resolution delta-sigma ADC. Two new architectural design techniques are proposed to reduce the power dissipation of the ADC. Compared to the conventional active adder, the direct charge transfer (DCT) adder greatly saves power by keeping the feedback factor of the active adder unity. However, the...
    Resource Type:
    Dissertation
    Full Text:
    Gabor C. Temes This dissertation presents a low-power high-resolution delta-sigma ADC. Two

  • Power Efficient Architectures for Medium-high Resolution Analog-to-Digital Converters

    Creator:
    Sadollahi, Mahmoud
    Abstract:
    Analog-to-digital converters are essential components to the portable devices that we are using today. Wireless sensors, body implanted devices, communication devices and so forth require low power ADCs. Therefore achieving higher resolution and bandwidth with lower power consumption is targeted in ADCs design. In this work power efficient ADCs for...
    Resource Type:
    Dissertation
    Full Text:
    : _____________________________________________________ Gabor C. Temes Analog-to-digital converters are essential components to the

  • Noise coupling techniques in multi-cell delta-sigma modulators

    Creator:
    Bonu, Madhulatha
    Abstract:
    High performance multi-cell delta-sigma modulators are a preferred choice in applications which require programmability. Multi-cell delta-sigma modulators with M unit cells provide 10log10(M) SQNR improvement for the same thermal noise and bias power due to the uncorrelated quantization noises of the M unit ADCs. This concept is used in this...
    Resource Type:
    Masters Thesis
    Full Text:
    : ______________________________________________________ Gabor C. Temes High performance multi-cell delta-sigma modulators are a preferred choice

  • Design techniques for low power ADCs

    Creator:
    Yu, Wenhuan
    Abstract:
    This dissertation presents an incremental analog-to-digital converter (ADC) with digital digital-to-analog converter (DAC) mismatch correction. A theoretical time-domain analysis technique was developed to predict the noise performance of the incremental ADC, and a new optimization technique was proposed to minimize the output noise. In the calibration mode, the incremental ADC...
    Resource Type:
    Dissertation
    Full Text:
    Abstract approved: ______________________________________________________ Gabor C. Temes This

  • Design techniques for low power high speed successive approximation analog-to-digital converters

    Creator:
    Lin, Jiaming
    Abstract:
    This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively. The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
    Resource Type:
    Dissertation
    Full Text:
    : ______________________________________________________ Gabor C. Temes This dissertation presents two high-speed pipeline successive

  • A MOSCAP pipeline pseudo passive DAC

    Creator:
    Behera, Prachee Shree
    Abstract:
    The design of a 10-bit pipelined charge redistribution DAC employing MOSCAPs biased in their accumulation mode is presented in this thesis. A switched capacitor filter and output buffer have also been designed for the system. The effect of MOSCAP nonlinearity on the performance of the pipelined charge redistribution DAC has...
    Resource Type:
    Masters Thesis
    Full Text:
    : Gabor C. Temes The design of a 10-bit pipelined charge redistribution