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Filtering by: Creator Gray, Matthew W. Remove constraint Creator: Gray, Matthew W. Advisor Moon, Un Ku Remove constraint Advisor: Moon, Un Ku

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  • Digital implementation of a mismatch-shaping successive-approximation ADC

    Creator:
    Coe, Matthew T.
    Abstract:
    Utilizing a two-capacitor topology, the digital implementation of an audio-band successive-approximation analog-to-digital converter (ADC) is explored in the context of mismatch-shaping where the mismatch estimates are accurate to the first order. A second-order Δ∑ loop was found to be effective in system simulations given a 0.1% capacitor mismatch. Spectral analysis...
    Resource Type:
    Masters Thesis
    Full Text:
    , August 1995. 12. P. W. Li, M. J. Chin, P. R. Gray, and R. Castello, "A ratio-independent algorithmic

  • Noise optimization for low-voltage CMOS audio preamplifier systems

    Creator:
    Brown, Matthew Eugene
    Abstract:
    There is a large and growing market for portable consumer audio products with very small size. As the size of these products is reduced, the area occupied by batteries becomes significant and hence limits the number of batteries to one. In order to build such small products, high levels of...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF Matthew Eugene Brown for the degree of

  • Active Noise Shaping Analog-to-Digital Data Converters

    Creator:
    Shi, Lukang
    Abstract:
    Successive-approximation-register (SAR) analog-to-digital converters are popular for medium accuracy, medium speed and low power applications, such as in biomedical applications. They have low latency and simple architecture compared with ΔΣ ADCs. This is because of SAR ADCs’ binary searching scheme. Furthermore, SAR ADCs can apply oversampling and noise shaping schemes...
    Resource Type:
    Dissertation
    Full Text:
    and Prof. Moon as my advisors. I really appreciate Professor Matthew Johnston, Professor Tejasvi

  • High-performance Ring Amplifier based Analog-to-Digital Converters

    Creator:
    Hu, Hang
    Abstract:
    Ring Amplifier serves as a great candidate both for precision amplification and fast integration in the discrete time system. It can be utilized in high-performance analog-to-digital converters (ADCs). In high-speed ADC utilizing pipelined architectures with residue amplification, Successive-Approximation Register (SAR) ADCs as the sub-ADC and power efficient Ring Amplifier based...
    Resource Type:
    Dissertation
    Full Text:
    committees Prof. Gabor Temes, Prof. Matthew Johnston, Prof. Tejasvi Anand and Prof. William H. Warnes for

  • Area efficiency improvement of CMOS charge pump circuits

    Creator:
    Perigny, Ryan
    Abstract:
    In this thesis, the literature relating to charge pump dc-dc converters and their uses is reviewed. Charge pumps are useful in many circuits, including low-voltage circuits, dynamic random access memory circuits, switched-capacitor circuits, EEPROM's and transceivers. The important issues relating to charge pump design are power efficiency, output voltage ripple...
    Resource Type:
    Masters Thesis
    Full Text:
    , Matthew, whose dedication, support and encouragement throughout my life have made me who I am today

  • Design techniques for PVT tolerant phase-locked loops

    Creator:
    Wu, Ting
    Abstract:
    The continued scaling of deep-submicron CMOS technology enables low-voltage high-frequency phase-locked loops (PLLs) to be fully integrated in complex mixed-signal systems. However, fluctuations due to the manufacturing process and variations in environmental conditions, such as supply voltage and temperature, are also significantly increased. As a result, the performance of PLLs...
    Resource Type:
    Dissertation
    Full Text:
    Hwang, Sunwoo Kwon, Naga Sasidhar Lingam, Nima Maghari, Erik Geissenhainer, Kye-Hyung Lee, Matthew

  • Power-Efficient Design Techniques and Architectures for Scalable Submicron Analog Circuits

    Creator:
    Xu, Yang
    Abstract:
    As the CMOS process scales down to submicron, digital circuit performance improves, while reduced supply voltage and lower transistor intrinsic gain make it difficult to implement analog circuits in a power efficient manner. Therefore, it has become advantageous to shift more analog signal processing functions conventionally realized in voltage (analog)...
    Resource Type:
    Dissertation
    Full Text:
    coordinating all the paperwork during my Ph.D. program. Thank Matthew Brown for organizing the lab meeting in

  • Design techniques for low-voltage analog-to-digital converter

    Creator:
    Chang, Dong-Young
    Abstract:
    Continuous process scale-down and emerging markets for low-power/low-voltage mobile systems call for low-voltage analog integrated circuits. Switched-capacitor circuits are the building blocks for analog signal processing and will encounter severe overdrive problems when operating at low-voltage conditions. There are several well-known techniques to bypass the problem. These approaches include: (1)...
    Resource Type:
    Dissertation
    Full Text:
    Scaling Factor Dimension X0, W, L, x1 1/K Substrate doping N K VDD V 1/K 'DD I 1/K Gate capacitance WL

  • OP-AMP free SC biquad LPF and delta-sigma ADC

    Creator:
    Yoo, Kiseok
    Abstract:
    The objective of this work is to explore the feasibility of replacing conventional op-amps with inverters in switched-capacitor (SC) circuits. In order to verify the idea, a low-pass filter (LPF) and a second-order delta-sigma (∆Σ) analog-todigital converter (ADC) are designed in the 0.5-m CMOS technology. The low-pass filter structure is...
    Resource Type:
    Masters Thesis
    Full Text:
    . 592-600, Dec 1977. [4] B. J. Hosticka, R. W. Brodersen and P. R. Gray, “MOS sampled-data recursive

  • 20-stage pipelined ADC with radix-based calibration

    Creator:
    Yun, Chong Kyu
    Abstract:
    A radix-based calibration technique was previously proposed with a two-stage algorithmic analog-to-digital converter (ADC). The objective of this work is to verify the capability of radix-based calibration for a true multi-stage ADC. In order to prove the idea, a single bit-per-stage, 20-stage pipelined ADC is designed in a 0.35-μm CMOS...
    Resource Type:
    Masters Thesis
    Full Text:
    . 40 BIBLIOGRAPHY [1] P. W. Li, M. J. Chin, P. R. Gray, and R. Castello, "A ratio independent