Search Constraints

Start Over
Filtering by: Alternative title ssim FS 51 Remove constraint Alternative title ssim: FS 51 Advisor Temes, Gabor C. Remove constraint Advisor: Temes, Gabor C.

Search Results

  • Design techniques for wideband low-power Delta-Sigma analog-to-digital converters

    Creator:
    Wang, Yan
    Abstract:
    Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of CMOS technology, they are becoming popular in wideband applications such as wireless and wired communication systems,high-definition television and radar systems. There are two general realizations...
    Resource Type:
    Dissertation
    Full Text:
    ......................................................................................... 51 3.6 Conclusions

  • 5th-Order Elliptic LPF Using Passive Charge Compensation Technique (PCC) Design

    Creator:
    Tsai, Cheng H.
    Abstract:
    The passive charge compensation (PCC) technique was introduced for switched capacitor (SC) circuit to increase the slew rate and enhance the linearity performance, as PCC techniques are used on the Delta-Sigma modulator (DSM) in ADC circuitry. The PCC technique of the project was applied to the design of a SC...
    Resource Type:
    Masters Thesis
    Full Text:
    = = = ∗ , (3.3) where fs is the sampling frequency. Figure 3.2. An SC resistor. In Figure 3.2, we

  • Power Efficient Architectures for Low Noise Switched-Capacitor Filters and High Accuracy Analog-to-Digital Converters

    Creator:
    Payandehnia, Pedram
    Abstract:
    Filters and data converters are key analog-and-mixed-signal (AMS) building blocks in communication systems, such as software-defined radios and internet-of-things. In this dissertation, novel switched-capacitor filter and analog-to-digital converter (ADC) circuit configurations have been explored which are power efficient and are digital scaling friendly. First, a novel switched-capacitor low-pass filter architecture...
    Resource Type:
    Dissertation
    Full Text:
    ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 2.22 Measured noise PSD (FS=300 MS/s). . . . . . . . . . . . . . . . . 52 3.1 Passive noise

  • Power Efficient Architectures for Medium-high Resolution Analog-to-Digital Converters

    Creator:
    Sadollahi, Mahmoud
    Abstract:
    Analog-to-digital converters are essential components to the portable devices that we are using today. Wireless sensors, body implanted devices, communication devices and so forth require low power ADCs. Therefore achieving higher resolution and bandwidth with lower power consumption is targeted in ADCs design. In this work power efficient ADCs for...
    Resource Type:
    Dissertation
    Full Text:
    resolution, few kHz bandwidth and µW-nW power dissipation. 7 Fs/2 BW P S D Freq ADCVin

  • Improved design techniques for analog and mixed circuits

    Creator:
    Nishida, Yoshio
    Abstract:
    Although the digital revolution can realize many of past analog components in the digital forms, our world is surrounded with analog signals such as voice, temperature, etc. The bridge between these two worlds is one of key performance limitations among overall systems and it includes analog filters and data converters....
    Resource Type:
    Dissertation
    Full Text:
    Experimental results (Fin=100kHz, Fs=40MHz) (a) Outputs (b) Output spectrum

  • Analysis and design of bandpass delta-sigma A/D converters

    Creator:
    Zhai, Dalun
    Abstract:
    A new approach to oversampled delta-sigma A/D converters ( AZ modulators ) is introduced, where a differential pseudo-Npath filter stage is used as a basic cell. In this band-pass application, the z to -zN transformation is employed to realize a RAM-type pseudo-2-path lossless integrator. The bandpass second-order and 4th-order delta-sigma...
    Resource Type:
    Masters Thesis
    Full Text:
    -order BAY, with digital correction 51 Fig.22 SNR degradation of the dual-quantizer 6th-order BAY

  • Oversampling digital-to-analog converters

    Creator:
    Shu, Shaofeng
    Abstract:
    Oversampling and noise-shaping methods for digital-to-analog (D/A) conversion have been widely accepted as methods of choice in high performance data conversion applications. In this thesis, the fundamentals of D/A conversion and oversampling D/A conversion were discussed, along with the detailed analysis and comparison of the reported state-of-the-art oversampling D/A converters....
    Resource Type:
    Dissertation
    Full Text:
    Vref vd(nTs) vdq(nTs) do(n) Periodic Uniform A/D N Sampling Quantization Conversion4 fs fs fs

  • High efficiency delta-sigma modulation data converters

    Creator:
    Lee, Kyehyung
    Abstract:
    Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common...
    Resource Type:
    Dissertation
    Full Text:
    ). ............................................. 50 3.17 Measured spectrum for the prototype ADC (a single cell only in RC4) .......... 51 3.18

  • Design techniques for low power high speed successive approximation analog-to-digital converters

    Creator:
    Lin, Jiaming
    Abstract:
    This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively. The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
    Resource Type:
    Dissertation
    Full Text:
    . ........................................................................................................................... 51 Fig. 3-12. (a) The 5-bit resistive DAC in the LSB stage and (b) the 5-bit capacitive DAC in the

  • Noise coupling techniques in multi-cell delta-sigma modulators

    Creator:
    Bonu, Madhulatha
    Abstract:
    High performance multi-cell delta-sigma modulators are a preferred choice in applications which require programmability. Multi-cell delta-sigma modulators with M unit cells provide 10log10(M) SQNR improvement for the same thermal noise and bias power due to the uncorrelated quantization noises of the M unit ADCs. This concept is used in this...
    Resource Type:
    Masters Thesis
    Full Text:
    with ideal blocks ........................................................... 51 4.23 Self