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  • Energy efficient communication across on-chip wires in digital CMOS

    Creator:
    Postman, Jacob
    Abstract:
    For the past half century, CMOS process scaling has followed Moore's law, approximately doubling transistor density every 18 months. While locally routed wires have generally scaled with transistor size, longer wires have scaled at a slower rate and in some cases have grown larger as chip size and complexity have...
    Resource Type:
    Dissertation
    Full Text:
    , longer wires have scaled at a slower rate and in some cases have grown larger as chip size and

  • The Architecture of a Reusable Built-In Self-Test for Link Training, IO and Memory Defect Detection and Auto Repair on 14nm Intel SOC

    Creator:
    Querbach, Bruce
    Abstract:
    The complexity of designing and testing today's system on chip (SOC) is increasing due to greater integrated circuit (IC) density and higher IO and memory frequencies. SOCs for the mobile phone and tablet market have the unique challenge of short product development windows, at times less than six months, and...
    Resource Type:
    Dissertation
    Full Text:
    . 31 Kim, and S.-I. Cho, “A 512-mb DDR3 SDRAM prototype with CIO minimization and self

  • Low-power design techniques for low-voltage analog-to-digital converters

    Creator:
    Kim, Min Gyu
    Abstract:
    The demand for portable electronic systems and the continued down-scaling of device dimensions resulted in rapid improvement in the performance of integrated systems. Several low-voltage design techniques have been proposed to operate analog circuits with sub-1V supply. However, these techniques require higher power consumption to achieve large dynamic range while...
    Resource Type:
    Dissertation
    Full Text:
    Low-Power Design Techniques for Low-Voltage Analog-to-Digital Converters by Min Gyu Kim A THESIS

  • Channel Estimation in TDD Massive MIMO Systems with Subsampled Data at BS

    Creator:
    Tian, Yichuan
    Abstract:
    Massive MIMO is a promising technique for future 5G communications due to its high spectrum and energy efficiency. To realize its potential performance gain, accurate channel state information at transmitter side (CSIT) is essential. Frequency division duplex (FDD) is widely employed by the most cellular systems today. However, it requires...
    Resource Type:
    Masters Thesis
    Full Text:
    : ______________________________________________________ Mario E. Magaña Massive MIMO is a promising technique for future 5G communications due to

  • Compressive Sensing for Low Power Sensor Design

    Creator:
    Behravan, Vahid
    Abstract:
    Recent sensor System-on-Chips (SoC) have enabled significant advances in energy-efficiency by incorporating various micro-powered building blocks. Unfortunately, most of these sensor systems do not address the high power cost associated with data storage and transmission, which in some cases vastly exceeds the power consumed by the rest of the SoC....
    Resource Type:
    Dissertation
    Full Text:
    proposed as a method to accomplish significant sensor data compression, achieving compression rates up

  • Information theoretic approach to quantization and classification for signal processing, communications, and machine learning applications

    Creator:
    Thuan Nguyen D.
    Abstract:
    There are five main contributions of this dissertation. The first contribution is new closed-form expressions for channel capacity of a new class of channel matrices. The second contribution is the discovery of the structure for optimal binary quantizer and the associated methods for finding an optimal quantizer that maximizes mutual...
    Resource Type:
    Dissertation
    Full Text:
    of a new class of channel matrices. The second contribution is the discovery of the structure for

  • Position estimation in indoor localization with trilateration

    Creator:
    Su, Zhenqiang
    Abstract:
    Triangulateration uses geometric distance to estimate the location of user by employing techniques like received signal strength (RSS), time-of-arrival (TOA), time-difference-of-arrival (TDOA) and image processing. Radio frequency (RF) signal positioning using TOA or TDOA techniques generally requires timing synchronization of the anchors and/or the anchors and targets. If the desired...
    Resource Type:
    Dissertation
    Full Text:
    systems. Specifically, we propose a synchronization-free positioning network archi- tecture that

  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF John A. Liebert for the degree of Master of Science in Electrical

  • A multi-bit hybrid DSM over full-scale range without feedback DEM

    Creator:
    Kwon, Sunwoo, 1974-
    Abstract:
    Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best known as a power-efficient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
    Resource Type:
    Dissertation
    Full Text:
    Hanumolu (at that time, a graduate student), Christopher and Amy Hanken, Min-Gyu Kim, Jim and Thuy Le

  • Modified VLSI designs for error correction codes

    Creator:
    Chen, Lupin
    Abstract:
    Nowadays, error correction codes have become an integral part in almost all the modern digital communication and storage systems. With the continuously increasing demands for higher speed and lower power communication systems, efficient VLSI implementations of those error correction codes have great importance for practical applications. In this thesis, several...
    Resource Type:
    Masters Thesis
    Full Text:
    (LDPC) codes decoder will be discussed. We propose a low-power memory-efficient Viterbi decoder to