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Filtering by: Creator Garmestani, A. S. Remove constraint Creator: Garmestani, A. S. Committee Member Liu, Huaping Remove constraint Committee Member: Liu, Huaping

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  • Energy efficient communication across on-chip wires in digital CMOS

    Creator:
    Postman, Jacob
    Abstract:
    For the past half century, CMOS process scaling has followed Moore's law, approximately doubling transistor density every 18 months. While locally routed wires have generally scaled with transistor size, longer wires have scaled at a slower rate and in some cases have grown larger as chip size and complexity have...
    Resource Type:
    Dissertation
    Full Text:
    N_off W-N_on S-E_off W_on S_off Route Compute East (a) R N R N R N R N R N R N R

  • The Architecture of a Reusable Built-In Self-Test for Link Training, IO and Memory Defect Detection and Auto Repair on 14nm Intel SOC

    Creator:
    Querbach, Bruce
    Abstract:
    The complexity of designing and testing today's system on chip (SOC) is increasing due to greater integrated circuit (IC) density and higher IO and memory frequencies. SOCs for the mobile phone and tablet market have the unique challenge of short product development windows, at times less than six months, and...
    Resource Type:
    Dissertation
    Full Text:
    6.4T/S 19 DRAM ORGANIZATION 20 ADJACENT NEIGHBORHOOD OF A MEMORY CELL B 21 DRAM FAULT SIMULATION

  • Modeling and analysis of spur structure of digital-to-time conversion based frequency synthesizers

    Creator:
    Talwalkar, Sumit A.
    Abstract:
    Frequency synthesizers are critical components of all communication systems. This thesis considers the issue of undesirable frequency spurs of a relatively recent type of frequency synthesis architecture called digital-to-time conversion (DTC). The DTC-based frequency synthesis architecture has important performance benefits over older frequency synthesizers, such as fast frequency switching, large...
    Resource Type:
    Dissertation
    Full Text:
    control signals CS and CR and a S-R (set-reset) flip flop (FF) shown in Figure 1.4. 10

  • Design techniques for low-power multi-GS/s analog-to-digital converters

    Creator:
    Jiang, Tao
    Abstract:
    Ultra-high-speed (>10GS/s), medium-resolution (5~6bit), low-power (<50mW) analog-to-digital converter can find it application in the areas of digital oscilloscopes and next-generation serial link receivers. There are several challenges to enable a successful design, however. First, the time-interleaved architecture is required in order to achieve over 10GS/s sampling rate, with the trade-off...
    Resource Type:
    Dissertation
    Full Text:
    previous work of sub-ADC, a 12-GS/s 5-b 50-mW ADC is designed in 40nm CMOS with 8 time-interleaved

  • Analysis and design on low-power multi-Gb/s serial links

    Creator:
    Hu, Kangmin
    Abstract:
    High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most...
    Resource Type:
    Dissertation
    Full Text:
    -7.2 Gb/s serial link receiver prototype using a forwarded clock architecture. A novel phase deskew

  • RF and Millimeter-wave Techniques to Improve Scalability and Efficiency of Digital Beamforming Arrays

    Creator:
    Johnson, Manoj
    Abstract:
    Spectrum overcrowding, ever increasing demand for high data rate and increased mobility requirements are three major challenges 5G-technology is trying to address. In this thesis I start with a RF front-end technique that deals with blocker interference arising from spectrum overcrowding both across frequency bands and within the same frequency...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 3.21 (a) 28 GHz input matching on PCB using L-C-L network with wirebonds, (b) Measured input s

  • Kinematic and cyclostationary parameter estimation for co-channel emitter location applications

    Creator:
    Ohm, David R.
    Abstract:
    The problem of locating a signal source, or an emitter, has many civilian and military applications, such as communication regulations enforcement, military reconnaissance, and search-and-rescue operations. Many of the most widely used emitter location methods rely on the accurate and robust estimation of the differential time delay, or time-difference-of-arrival (TDOA),...
    Resource Type:
    Dissertation
    Full Text:
    Abstract approved: S. Lawrence Marple Jr. The problem of locating a signal source, or an emitter, has

  • Multi-dimensional parametric estimation: two-dimensional sharpening by predictive bandwidth extrapolation and fast algorithms for three dimensional autoregressive estimation

    Creator:
    Liew, Ji Seok
    Abstract:
    Achieving sharpened (enhanced detail) features of a multi-dimensional data source using the linear prediction (LP) bandwidth extrapolation (BWE) technique in the transform domain is the main objective of this research. The evolution of sensor technology has provided acquisition scenarios in which the data format is inherently multi-dimensional, including hyperspectral imaging...
    Resource Type:
    Dissertation
    Full Text:
    : _____________________________________________________ S. Lawrence Marple, Jr. Achieving sharpened (enhanced detail) features of a multi

  • An ultra low power frequency reference for timekeeping applications

    Creator:
    Oporta, Hector Ivan
    Abstract:
    An ultra low power crystal oscillator that provides a frequency reference for battery powered timekeeping applications is presented. An amplitude control circuit is employed to ensure that minimum current is consumed. A subthreshold voltage regulator provides a supply voltage for the oscillator with minimum current consumption. The oscillator and regulator...
    Resource Type:
    Masters Thesis
    Full Text:
    Ultra Low Power Frequency Reference For Timekeeping Applications Abstract approved: Terri S. Fiez

  • An enhanced swing differential Colpitts CMOS VCO for low-voltage operation

    Creator:
    Farahbakhshian, Farhad
    Abstract:
    An enhanced swing differential Colpitts VCO (ESDC-VCO) dramatically improves the swing of a Colpitts VCO by allowing the signal to swing below ground and above the supply voltage. Fabricated in a 1P8M 0.13 um CMOS process, the ESDC-VCO operates at 4.9GHz with a 0.475-V supply and consumes 2.7mW. The measured...
    Resource Type:
    Masters Thesis
    Full Text:
    . Samori, S. Levantino, and A. Lacaita “A 2 V 2.5-GHz-104 dBc/Hz at 100kHz fully-integrated VCO with wide