The dependence of the substrate resistance, R[subscript sub], for MOS transistor RF modeling on transistor biasing and layout is studied from device simulations and measurements. Though R[subscript sub] is found to be bias dependent, the error incurred by assuming a constant value equal to the DC resistance is not significant....
Estimating the carrier frequency from a modulated waveform is one of the most important functions of a coherent signal receiver. Good performance and low bit error rates are obtained by coherent demodulation. Therefore, exact knowledge of the received signal carrier frequency is critical for communication systems. Also due to the...
Advancements in power electronics to higher power levels and faster switching times allow new machine and systems designs, but also create higher stresses on electric machinery insulation. High performance, pulse-width modulated (PWM) inverters are now available for medium voltage drive systems, and are being considered by the U.S. Navy as...
Phase-locked loop (PLL) frequency synthesizers lie at the heart of most radio transceivers. An important objective of the electronics and communications industry is to design high-speed building blocks which dissipate the lowest possible power, and to ac- complish this with the cheapest technology. The dual-modulus prescaler is one of the...
Advanced low power devices promote the development of micro power generators (MPGs) to replace the batteries to power them. Due to the trend in decreasing integrated circuit (IC) supply voltages, power supply designers are facing more and more serious challenges. The objective of this research is to design a power...
The electrical behavior of on-chip interconnects has become a dominant factor in silicon-based high speed, RF, and mixed-signal integrated circuits. In particular, the frequency-dependent loss mechanisms in heavily-doped silicon substrates can have a large influence on the transmission characteristics of on-chip interconnects. To optimize the performance of the integrated circuit,...
This thesis proposes a novel fully digital technique for the estimation and correction of the DAC error in multi-bit delta sigma ADCs. The structure of the DAC error is indicated through a simple model for unit-element based DACs. The impact of the DAC error on the performance of ADC is...
In this thesis, a novel Direct-Charge-Transfer (DCT) integrator structure is proposed, which can settle much faster than regular switch-capacitor integrators. A new Spread-Spectrum Dynamic Element Matching (SS-DEM) algorithm is also introduced, which can effectively spread or shape the nonlinearity error of multi-bit DAC in the feedback path, thus improve the...
This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...
This dissertation investigates the use of a hardware mechanism called Eager Data Transfer (EDT) for achieving the reduction of communication latency for user-level network protocol. To reach the goal, the dissertation addresses the following research issues. First, the development of a communication system performance evaluation tool called Linux/SimOS is presented....