A computationally efficient and accurate substrate noise coupling model for multiple contacts in heavily doped CMOS processes is presented and validated with simulations and experimental data. The model is based on Z parameters that are scalable with contact separation and size. This results in fast extraction of substrate resistances for...
This thesis presents a design-oriented model for lightly doped CMOS substrates. The model predicts the substrate noise coupling between noisy digital and sensitive analog blocks in the early stages of the design. The model scales with the size and separation of these blocks and it is validated with device simulations...
FISHNET (Facilities Integrated in a Shared Habitat) is a communication subnet architecture utilizing a hybrid application of point-topoint and broadcast communications to achieve a high degree of network performance. This objective is achieved through utilizing a dual bus structure: a data bus and a control bus. The data bus consists...
The problem of locating a signal source, or an emitter, has many civilian and military applications, such as communication regulations enforcement, military reconnaissance, and search-and-rescue operations. Many of the most widely used emitter location methods rely on the accurate and robust estimation of the differential time delay,
or time-difference-of-arrival (TDOA),...
Systems biology is becoming increasingly important for the study of living organisms. It focuses on the mathematical understanding of biological systems. Cells, the basic units of all living creatures, are biological systems of major interest. Considerable work is being done towards modeling cells as mathematical systems. At the same time,...
A new approach to oversampled delta-sigma A/D converters ( AZ modulators ) is introduced, where a differential pseudo-Npath filter stage is used as a basic cell. In this band-pass application, the z to -zN transformation is employed to realize a RAM-type pseudo-2-path lossless integrator. The bandpass second-order and 4th-order delta-sigma...
A digital phase locked loop (DPLL) and a statistical time-to-digital converter (STDC) were previously fabricated in a 0.35µm, 3.3V SOI CMOS process. This work summarizes these designs and characterizes the measured performance. Simulations supplement the measurements where applicable.
The DPLL was found to reach a locked state under a limited...
The detection of motor faults at their incipient stage is of prime importance to any industrial plant. The introduction of adjustable speed drives has improved the control and the efficiency of induction motors, however, this has changed the nature of motor faults and how they can be detected.
Current signature...
At frequencies exceeding 1-2 GHz, the substrate network models used in substrate coupling simulation must account for the reactive nature of the substrate. Unlike at low frequencies, where the purely resistive substrate models can be validated through DC resistance measurements, these high-frequency models, comprising reactive components, must be validated through...