Index Catalog // ScholarsArchive@OSU

Characterization of solution-based inorganic semiconductor and dielectric materials for inkjet printed electronics

Creator:: Munsee, Craig L.
Abstract:: The long-term goal of this research project is the development of solution-based inorganic dielectric and semiconductor materials for inkjet printed electronics. The main focus of this thesis involves testing of the materials and devices under development. A new solution-based inorganic dielectric material (HfOSO₄), given the name hafsox, is developed and...
Resource Type:: Masters Thesis
Full Text:: by Craig L. Munsee A THESIS submitted to Oregon State University in partiai fulfillment of the

Modeling and development of p-type thin-film transistors

Creator:: Spiegelberg, Matthew Craig
Abstract:: The primary focus of this thesis involves modeling and development of p-type thin-film transistors (p-TFTs), moving towards the realization of a filly transparent thin-film transistor (TTFT). The modeling portion of this thesis emphasizes the development of physics-based TFT models, specifically focusing on the elucidation of non-ideal current-voltage characteristic behavior. A...
Resource Type:: Masters Thesis
Full Text:: ofp-type Thin-Film Transistors by Matthew Craig Spiegelberg A THESIS submitted to Oregon

A 1-m W, 14-bit [sigma] [delta] A/D converter with 10-KHz conversion rate

Creator:: Gupta, Shivani
Resource Type:: Masters Thesis
Full Text:: 1-mW, 14-bit EA A/D Converter with 10-KHz Conversion Rate Abstract approved- Stephen M. Goodnick

The Effectiveness of Using Robotics for Career Technology Education in a Middle School STE(A)M Course

Creator:: Bodle, Ernie
Abstract:: Using robotics in education allows students to become familiar with multiple topics in science, technology, engineering, and mathematics (STEM). With the use of robotic educational tools in the 8th – 12th grade classrooms, such as Sphero, Anki Cozmo, and Lego Mindstorms, few devices allow students to build the robots’ electrical...
Resource Type:: Masters Thesis
Full Text:: . Title: The Effectiveness of Using Robotics for Career Technology Education in a Middle School STE(A)M

Substrate noise coupling analysis in 0.18um silicon germanium (SiGe) and silicon on insulator (SOI) processes

Creator:: Pham, Hui En
Abstract:: Analysis of substrate noise coupling has been performed for a 0.18¹m lightly doped silicon germanium BiCMOS process. Techniques to minimize noise coupling in the chip and board design are presented, as well as methods for accurate modeling for substrate noise coupling simulations. Measurements from a test chip were taken to...
Resource Type:: Masters Thesis
Full Text:: cases with a ground trace inductance of 13nH (light shading) and 1.5nH (dark shading), where M is the

Low-power high-performance 32-bit 0.5[u]m CMOS adder

Creator:: Shah, Parag Shantu
Abstract:: Currently, the two most critical factors of microprocessor design are performance and power. The optimum balance of these two factors is reflected in the speed-power product(SPP). 32-bit CMOS adders are used as representative circuits to investigate a method of reducing the SPP. The purpose of this thesis is to show...
Resource Type:: Masters Thesis
Full Text:: ) is a super set of Po(n). The most significant bit (MSB) of the right block (bit m) has a large fan

New algorithms and architectures for arithmetic in GF(2[superscript m]) suitable for elliptic curve cryptography

Creator:: Rodríguez-Henríquez, Francisco
Abstract:: During the last few years we have seen formidable advances in digital and mobile communication technologies such as cordless and cellular telephones, personal communication systems, Internet connection expansion, etc. The vast majority of digital information used in all these applications is stored and also processed within a computer system, and...
Resource Type:: Dissertation
Full Text:: a generalized m = 193-bit binary Karat- suba multiplier .......................... 81 5.7

The design of a single chip logic state analyzer

Creator:: Hung, Shih-chuan
Abstract:: This thesis describes the design of a single-chip logic analyzer. The utility of such a chip in measuring and recording digital system parameters is illustrated. Possibilities for future applications of this chip in performance monitoring of computer systems are discussed.
Resource Type:: Masters Thesis
Full Text:: approved: Redacted for Privacy John M. Murray This thesis describes the design of a single-chip logic

Accurate and efficient simulation of synchronous digital switching noise in system on a chip

Creator:: Habal, Husni
Abstract:: A new method is presented to compress switching information in large digital circuits. This is combined with an efficient approach of generating the noise signatures of cells in a digital library that results in an accurate and efficient approach for estimating the noise generated in digital circuits. This method provides...
Resource Type:: Masters Thesis
Full Text:: period to be substituted into the cell macro model. 12 If there are M inputs to a digital cell and

Energy efficient communication across on-chip wires in digital CMOS

Creator:: Postman, Jacob
Abstract:: For the past half century, CMOS process scaling has followed Moore's law, approximately doubling transistor density every 18 months. While locally routed wires have generally scaled with transistor size, longer wires have scaled at a slower rate and in some cases have grown larger as chip size and complexity have...
Resource Type:: Dissertation
Full Text:: , longer wires have scaled at a slower rate and in some cases have grown larger as chip size and

ScholarsArchive@OSU

Characterization of solution-based inorganic semiconductor and dielectric materials for inkjet printed electronics

Modeling and development of p-type thin-film transistors

A 1-m W, 14-bit [sigma] [delta] A/D converter with 10-KHz conversion rate

The Effectiveness of Using Robotics for Career Technology Education in a Middle School STE(A)M Course

Substrate noise coupling analysis in 0.18um silicon germanium (SiGe) and silicon on insulator (SOI) processes

Low-power high-performance 32-bit 0.5[u]m CMOS adder

New algorithms and architectures for arithmetic in GF(2[superscript m]) suitable for elliptic curve cryptography

The design of a single chip logic state analyzer

Accurate and efficient simulation of synchronous digital switching noise in system on a chip

Energy efficient communication across on-chip wires in digital CMOS

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