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Filtering by: Alternative title ssim FS-234 Remove constraint Alternative title ssim: FS-234 Degree Field Electrical and Computer Engineering Remove constraint Degree Field: Electrical and Computer Engineering

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  • Influence of adjustable speed drive on induction motor fault detection using stator current monitoring.

    Creator:
    Al-Shahrani, Ali
    Abstract:
    The detection of motor faults at their incipient stage is of prime importance to any industrial plant. The introduction of adjustable speed drives has improved the control and the efficiency of induction motors, however, this has changed the nature of motor faults and how they can be detected. Current signature...
    Resource Type:
    Masters Thesis
    Full Text:
    fs±fr (b) Upper sidebands of fs±fr (c) Upper sidebands of fs±3fr

  • Design and analysis techniques for nano-joule ADCs and sampling linearity

    Creator:
    Brown, Thomas (Thomas William)
    Abstract:
    Two aspects of ADC system performance are addressed in this work. First, the combination of the ADC and its associated reference are co-designed for an energy constrained remote sensing system. Second, sampling linearity is mathematically analyzed as a function of frequency to provide enhanced understanding into an ADC's requisite sampling...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 3.14 Measured fundamental, HD2, HD3, HD4, and HD5 versus input frequency at Fs = 19MSPS

  • Lowpass and bandpass current-mode delta-sigma DACs employing mismatch-shaping

    Creator:
    Shui, Tao, 1969-
    Abstract:
    Delta-sigma modulators are currently a very popular technique for making high-resolution analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). These oversampled data converters have several advantages over conventional Nyquist-rate converters, including an insensitivity to many analog component imperfections, a simpler antialiasing filter and reduced accuracy requirements in the sample and hold....
    Resource Type:
    Dissertation
    Full Text:
    ) Figure Page 4.12: SNR vs. Clock jitter for the modulator under test (fo=fs/128) 64 4.13: SNR vs. clock

  • Multi-bit delta-sigma switched-capacitor DACs employing element-mismatch-shaping

    Creator:
    Lin, Haiqing
    Abstract:
    Delta-sigma modulators are currently a very popular technique for making high-resolution analog-to-digital and digital-to-analog converters (ADCs and DACs). Most delta-sigma modulators in production today employ single-bit quantization because a 1-bit DAC is inherently linear, whereas a multi-bit DAC is not. Were it not for this drawback, the use of multi-bit...
    Resource Type:
    Dissertation
    Full Text:
    signal occupies the band from DC to f B and the sampling rate is fs, the oversampling ratio (OSR) R is

  • A Wireless Energy Harvester for Powering Event-driven Internet-of-things Applications and Battery Charging

    Creator:
    Sadagopan, Kamala Raghavan
    Abstract:
    The need for sustainably powering unobtrusive internet-of-things applications has led to an interest in energy harvesting. Particularly, the proliferation of wireless communication and devices in the 2.4 GHz Industrial Scientific c Medical (ISM) band creates an opportunity to leverage commonly used devices for RF powering. This dissertation presents a low-quiescent-power...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.6 Losses are a function of fs and switch sizes, and this dependence is illustrated here for PAV

  • Finite element based rotor design optimization for the brushless doubly-fed machine

    Creator:
    Salim, Mohamed Ali, 1968-
    Abstract:
    Brushless Doubly-Fed Machines have potential benefits in variable speed generation and adjustable speed drive applications by combining a robust machine structure with a reduced power converter rating. While recent work has demonstrated feasibility, steady-state performance has not been optimized. The nature of doubly-fed operation causes rotor currents of varying, relatively...
    Resource Type:
    Masters Thesis
    Full Text:
    4.1 Six-Pole Current-Forced IM Flux Plot (round bar, deep slot) (a) fr=5Hz, (b) fs=30Hz, and (c) fs

  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
    Resource Type:
    Dissertation
    Full Text:
    ……………………………………………68 6-6a Output PSD with randomization, DWA,Bi DWA and SeDWA (fin =2-11 fs

  • A multi-bit delta sigma audio digital-to-analog converter

    Creator:
    Wang, Ruopeng
    Abstract:
    Digital-to-analog converters (DACs) with wide dynamic range and high linearity are required for high-end audio applications. A multi-bit delta sigma audio DAC, using a novel gain-correction technique, is described in this thesis. For widely varying on-chip RC time constant, the DAC gain can be accurately controlled by the correction circuitry....
    Resource Type:
    Dissertation
    Full Text:
    frequency fs that is at least twice the signal bandwidth fB, which is called Nyquist rate, the signal can

  • Linearizing techniques for voltage controlled oscillator based analog to digital converters

    Creator:
    Rao, Sachin B.
    Abstract:
    Voltage controlled oscillator (VCO) based ADC is an important class of time-domain ADC that has gained widespread acceptance due to their several desirable properties. VCO-based ADCs behave like an open-loop continuous time ΔΣ modulator and achieve excellent resolution by first order noise shaping the quantization error. However, the SNDR of...
    Resource Type:
    Dissertation
    Full Text:
    matching requirement (800 fs-rms) on the delay-stages in the TDC that are used to generate the feedback

  • A multi-bit hybrid DSM over full-scale range without feedback DEM

    Creator:
    Kwon, Sunwoo, 1974-
    Abstract:
    Evolution of the mobile communication standards and proliferation of hand-held devices mandate stringent Analog-to-Digital Converter (ADC) specifications. Among various ADCs, a ∆Σ ADC is best known as a power-efficient ADC when more than 12b is required. However, a conventional discrete-time (DT) ∆Σ Modulator (∆ΣM) is inadequate for low-power wideband applications...
    Resource Type:
    Dissertation
    Full Text:
    integrator (blue dotted). Opamp GBW is normalized to sampling frequency, FS