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  • Electro-optic characterization of SrS-based alternating current thin-film electroluminescent devices

    Creator:
    Nevers, Corey A.
    Abstract:
    Two methods of electro-optically characterizing alternating-current thin-film electroluminescent (ACTFEL) devices are investigated: photo-induced transferred charge (PIQ) and luminescence (PIL), and subthreshold voltage-induced transferred charge (VIQ) techniques. Both techniques provide information related to traps within the phosphor layer. PIQ/PIL experiments monitor the transport of electrons and holes across the phosphor layer...
    Resource Type:
    Masters Thesis
    Full Text:
    creation of space charge. (b) Energy bands after space charge creation 11 2.6 Experimental setup for

  • A digital multiplying delay locked loop for high frequency clock generation

    Creator:
    Uttarwar, Tushar
    Abstract:
    As Moore’s Law continues to give rise to ever shrinking channel lengths, circuits are becoming more digital and ever increasingly faster. Generating high frequency clocks in such scaled processes is becoming a tough challenge. Digital phase locked loops (DPLLs) are being explored as an alternative to conventional analog PLLs but...
    Resource Type:
    Masters Thesis
    Full Text:
    ……………………………………………………………8 2.2 QUANTIZATION NOISE IN DIGITAL MDLL…………………………………………………………..11 3. CIRCUIT DESIGN

  • Low noise clocking for high speed serial links

    Creator:
    Brownlee, Merrick
    Abstract:
    As the functionality of digital chips continues to increase dramatically, chip- to-chip communication bandwidths must scale accordingly to avoid constraining the overall system performance. Therefore, high speed transceiver design has be- come an important research topic. In particular, the performance of the circuits that are responsible for timing accuracy are...
    Resource Type:
    Dissertation
    Full Text:
    on eye opening 11 2.7 Eye diagram before and after receive jitter 12 2.8 (a) The effect of

  • Power Efficient Architectures for Low Noise Switched-Capacitor Filters and High Accuracy Analog-to-Digital Converters

    Creator:
    Payandehnia, Pedram
    Abstract:
    Filters and data converters are key analog-and-mixed-signal (AMS) building blocks in communication systems, such as software-defined radios and internet-of-things. In this dissertation, novel switched-capacitor filter and analog-to-digital converter (ADC) circuit configurations have been explored which are power efficient and are digital scaling friendly. First, a novel switched-capacitor low-pass filter architecture...
    Resource Type:
    Dissertation
    Full Text:
    ]. . . . . . . . . . . . . . . . . 11 1.7 IIP3 and OIP3 [1]. . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.8 Anti-aliasing

  • Electrical characterization, maximum charge-maximum voltage (Q[max]-V[max]) analysis, aging and temperature studies of thiogallate thin-film electroluminescent devices

    Creator:
    Pham, Long V.
    Resource Type:
    Masters Thesis
    Full Text:
    Master of Science in Electrical and Computer Engineering presented on August 11, 1995 . Title

  • The use of electromagnetic Walsh waves in radar

    Creator:
    Schaffer, Alvin
    Abstract:
    The question of the suitability of Walsh functions or similar bi-valued functions used as a radar electromagnetic carrier waveform is considered. Walsh functions are described and effective sinusoidal steady state transfer functions are defined for transmission elements, antenna systems, and propagation media. The argument is made that the unit impulse...
    Resource Type:
    Dissertation
    Full Text:
    integral 10 Rectangular aperture unit impulse response 213 11 Distortion of a rectangular aperture unit

  • Low-voltage switched-capacitor circuits

    Creator:
    Bidari, Emad
    Abstract:
    In recent years, the rapidly growth of CMOS technology has evolved towards submicron and deep-submicron features. Due to smaller device sizes, and significant demand for low-power designs, the maximum allowable power supply voltage is restricted. So far, two solutions; clock boosting and switched opamp schemes have been proposed. The material...
    Resource Type:
    Masters Thesis
    Full Text:
    11 2.3 Integrator Realization Using Master/Slave Integrators 14 3. LOW-VOLTAGE SC FILTER STAGES

  • A 1V 40mA Fast Transient Capless LDO with 7uA Quiescent Current in 180nm CMOS using Ring Amplifier with Adaptive Damping

    Creator:
    Xiao, Bohui
    Abstract:
    Ring amplification has emerged as an efficient technique to drive large capacitive loads in switched capacitor circuits. We propose circuit techniques to demonstrate the first application of a ring amplifier in a non-capacitive feedback system of a LDO. These techniques enable a simple cap-less LDO structure in 180nm CMOS that...
    Resource Type:
    Masters Thesis
    Full Text:
    Regulator……..….10 3. RING AMPLIFIER IN LDO..…………………………………………………….11 3.1. Design Procedure

  • A dual-path 2-0 MASH ADC with dual digital error correction

    Creator:
    Zhang, Zhenyong
    Abstract:
    This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
    Resource Type:
    Dissertation
    Full Text:
    improvement after turning on digital correction…………..60 5-11 SNR and SNDR versus input amplitude with

  • Techniques for improving timing accuracy of multi-gigahertz track/hold circuits

    Creator:
    Wang, Jingguang
    Abstract:
    Multi-Gigahertz sampling rate Analog-to-Digital Converters (ADC) with 5-8 bits resolution are used in many signal communication applications. Unfortunately, the performance of the high speed ADC is limited by the timing accuracy of the sampling clock. A small sampling uncertainty can cause a large error in the sampled voltage and result...
    Resource Type:
    Masters Thesis
    Full Text:
    ......................................................... 11 2.2 SFDR limitation in T/H circuits