Digital-to-analog converters (DACs) suffer from static and dynamic nonlinearity problems, which degrade their accuracy and performance. Mismatch errors in the analog components restrict the maximum achievable linearity.
This thesis presents various techniques for correcting these errors. It describes a correction process for the nonlinear behavior of DACs, on three different...
Incremental ADCs (IADCs) have found wide applications in sensor interface circuitry since, compared to ∆Σ ADCs, they provide low-latency high-accuracy conversion and easy multiplexing among multiple channels. On the other hand, continuous-time ∆Σ ADCs (CTDSM) have been receiving more and more attention as a power-efficient solution in targeting medium to...
Delta-sigma analog-to-digital converters traditionally have been used for low speed, high resolution applications such as measurements, sensors, voice and audio systems. Through continued device scaling in CMOS technology and architectural and circuit level design innovations, they have even become popular for wideband, high dynamic range applications such as wired and...
Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion—they are easy to multiplex between channels, need simpler digital decimation filter, and allow extended counting with a Nyquist-rate ADC. A single-loop incremental ADC was designed and fabricated in 90 nm for a biosensor interface circuit. It incorporates one integrator,...
Nowadays, needs for wideband and high accuracy analog-to-digital converter are increasing rapidly in manifold applications such as wireless communication, digital video and other consumer electronics. Besides, low power consumption is required to have longer battery life in portable systems. CMOS technology scaling and innovative modulator topology make the implementation much...
This dissertation presents a dual-path 2-0 MASH (Multi-stAge-noise -SHaping) ADC with two verified digital corrections of DAC mismatch error and quantization noise leakage. By using these two techniques, the requirements for the analog circuits are greatly relaxed. The dual-path structure generates two outputs, one only composed of conversion errors, the...
As CMOS processes keep scaling down devices, the maximum operating frequencies of CMOS devices increase, and hence circuits can process very wide band signals. Moreover, the small physical dimensions of transistors allow the placing of many more blocks into a single chip, including highly accurate analog blocks and complicated digital...
This thesis describes compensation techniques for cascaded delta-sigma A/D
converters (ADCs) and high-performance switched-capacitor (SC) circuits. Various
correlated-double-sampling (CDS) techniques are presented to reduce the effects of the
nonidealities, such as clock feedthrough, charge injection, opamp input-referred noise and
offset, and finite opamp gain, in SC circuits. A CDS technique...
Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are widely used in wireless transceivers. Recently, continuous-time (CT) ΔΣ ADCs gain growing interest in wireless applications for their lower power consumption and wider input bandwidth as compared with the discrete-time (DT) counterparts.
In this thesis, a wideband low-power CT ΔΣ modulator for next generation...
The precise measurement of a capacitance difference or ratio in a digital form is
very important for capacitive sensors, for CMOS process characterization as well as for the
realization of precise switched-capacitor data converters, amplifiers and other circuits
utilizing ratioed capacitors. This thesis introduces design techniques for on-chip capacitor
ratio...