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Filtering by: Subject Rotary converters -- Design and construction Remove constraint Subject: Rotary converters -- Design and construction Degree Level Doctoral Remove constraint Degree Level: Doctoral

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  • Automated verilog-to-layout synthesis of ADCs using custom analog cells

    Creator:
    Waters, Allen
    Abstract:
    A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools that are common in digital circuit design. A method for adding rudimentary analog cells to the standard library is described, allowing the designer to synthesize...
    Resource Type:
    Dissertation
    Full Text:
    procedure for automating the design and layout of analog-to-digital con- verters (ADCs) is presented. This

  • Micropower incremental analog-to-digital converters

    Creator:
    Chen, Chia-Hung
    Abstract:
    Incremental ADCs (IADCs) have many advantages for low-frequency high-accuracy data conversion—they are easy to multiplex between channels, need simpler digital decimation filter, and allow extended counting with a Nyquist-rate ADC. A single-loop incremental ADC was designed and fabricated in 90 nm for a biosensor interface circuit. It incorporates one integrator,...
    Resource Type:
    Dissertation
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    .........................................................................................................3 2.2 The Analysis and Design of IADCs

  • Design of a 1.8-V 14-bit [delta] - [sigma] A/D converter with 8X oversampling and 4 MHz Nyquist output rate

    Creator:
    Jiang, Ruoxin
    Abstract:
    In this dissertation, a new Δ∑ A/D converter is presented that is ideally suited for communication applications. It is based on a single-loop single-stage structure, which can realize a high maximum out-of-band quantization noise gain while maintaining stable operation and thus achieve 14-bit resolution at 8 times oversampling. A fifth-order...
    Resource Type:
    Dissertation
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    , 2001. Title: Design of a 1.8-V 14-bit L I A/D Converter with 8X Oversampling and 4 MHz Nyquist Output

  • A multi-bit delta sigma audio digital-to-analog converter

    Creator:
    Wang, Ruopeng
    Abstract:
    Digital-to-analog converters (DACs) with wide dynamic range and high linearity are required for high-end audio applications. A multi-bit delta sigma audio DAC, using a novel gain-correction technique, is described in this thesis. For widely varying on-chip RC time constant, the DAC gain can be accurately controlled by the correction circuitry....
    Resource Type:
    Dissertation
    Full Text:
    the circuit design. His encouragement and valuable comments throughout the working on the research

  • Design techniques for low-voltage and low-power analog-to-digital converters

    Creator:
    Ahn, Gil Cho
    Abstract:
    With the ever-increasing demand for portable devices used in applications such as wireless communication, mobile computing, consumer electronics, etc., the scaling of the CMOS process to deep submicron dimensions becomes more important to achieve low-cost, low-power and high-performance digital systems. However, this downscaling also requires similar shrinking of the supply...
    Resource Type:
    Dissertation
    Full Text:
    : Design Techniques for Low-Voltage and Low-Power Analog-to-Digital Converters. Abstract approved: Un-Ku

  • High efficiency delta-sigma modulation data converters

    Creator:
    Lee, Kyehyung
    Abstract:
    Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common...
    Resource Type:
    Dissertation
    Full Text:
    continued trend keeps innovation in the design of data converter continuing. Traditionally, delta-sigma

  • Energy and area efficient techniques for data converters

    Creator:
    Venkatram, Hariprasath
    Abstract:
    Data converters are ubiquitous building blocks of a signal chain. The rapid increase in communication and connectivity devices presents new avenues for pushing the state of the art analog to digital converters. Techniques for improving resolution, bandwidth, linearity and bit-error rate, while reducing the power, energy and area is the...
    Resource Type:
    Dissertation
    Full Text:
    converter techniques and architectures. In the second chapter, various trade-off in an ADC design are

  • Design techniques for low power high speed successive approximation analog-to-digital converters

    Creator:
    Lin, Jiaming
    Abstract:
    This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively. The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
    Resource Type:
    Dissertation
    Full Text:
    Electrical and Computer Engineering presented on July 8, 2013. Title: Design Techniques for Low Power

  • Design techniques for low-power multi-GS/s analog-to-digital converters

    Creator:
    Jiang, Tao
    Abstract:
    Ultra-high-speed (>10GS/s), medium-resolution (5~6bit), low-power (<50mW) analog-to-digital converter can find it application in the areas of digital oscilloscopes and next-generation serial link receivers. There are several challenges to enable a successful design, however. First, the time-interleaved architecture is required in order to achieve over 10GS/s sampling rate, with the trade-off...
    Resource Type:
    Dissertation
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    (<50mW) analog-to-digital converter can find it application in the areas of digital oscilloscopes and

  • Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays

    Creator:
    Meng, Xin
    Abstract:
    Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...
    Resource Type:
    Dissertation
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    Corporation (SRC), the Center for Design of Analog and Digital Integrated Circuits (CDIDIC), Texas