The gm/ID-based design of analog integrated circuits introduced in 1996 employs an empirical transistor sizing methodology using SPICE-generated lookup tables that enables good agreement between simulations and specifications. This thesis introduces a new SPICE lookup table that extends the gm/ID approach to the Miller pole-splitting frequency compensation of the classical...
The operational transconductance amplifier (OTA) is a fundamental building block in analog and mixed-signal systems. This research describes a process-, voltage-, and temperature- (PVT) insensitive low-voltage tracking RC compensation scheme considered for two-stage CMOS OTAs, which cancels the pole due to the load capacitance using a Miller zero generated by...
Deep Learning methods have been gaining a lot of significance for various Biomedical applications for diagnosing several types of diseases. Two applications considered here are: 1) Diabetic Retinopathy Detection and 2) ECG signal Classification (or Arrhythmia Detection). Diabetic Retinopathy (DR) is a major cause of blindness in Diabetic patients, and...
In any biomedical signal acquisition system, a front-end amplifier is needed to amplify low amplitude bio-signals while filtering out any unwanted low-frequency artifacts. The design of low frequency poles within the sub-Hz range implies very large time-constants which goes against system integrability. In recent years, the pseudo resistor has been...
The CMOS two-stage Operational Transconductance Amplifier (OTA) has been a key enabler for mixed-signal IC design for nearly four decades . This research focuses on a modified two-stage CMOS OTA that features load-pole cancellation (LPC); i.e., the resulting architecture is essentially a two-stage CMOS OTA with no load capacitance. The...
Recently, switched-current circuits have received great
attention because they offer potentially better performance in terms
of speed, low voltage power supplies, and accuracy in mixed-mode
analog-digital signal processing. In this thesis, the distortion
characteristics, DC offset and AC gain errors induced by the threshold
voltage, channel width, channel length, and...
A short-circuit-protected line-driver circuit is
particularly adapted for use in a CMOS differential line-driver
system, where one line-driver circuit provides a
true output signal, and another line-driver circuit
provides a complementary false output signal. A short-circuit
is sensed by measuring current through a secondary
pull-up transistor, and disabling a primary...
The core area of a conventional CMOS digital gate
array consists of only one size of NMOS device and one
size of PMOS device. Both primitives have fixed minimum
channel lengths, and this has significantly impeded analog
applications. This work has shown that by forming series
and parallel interconnections between...
A frequency compensation technique for increasing the
settling speed of two-stage operational amplifiers used in
switched-capacitor applications has been developed. By
properly decompressing the pole-zero doublet to form a
three-pole one zero system, the settling speed is increased
up to 50 percent as compared to the optimized two-pole
system.