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Filtering by: Subject Phase-locked loops -- Design and construction -- Evaluation Remove constraint Subject: Phase-locked loops -- Design and construction -- Evaluation Resource Type Masters Thesis Remove constraint Resource Type: Masters Thesis

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  • Characterization of a digital phase locked loop and a stochastic time to digital converter

    Creator:
    Geissenhainer, Erik D.
    Abstract:
    A digital phase locked loop (DPLL) and a statistical time-to-digital converter (STDC) were previously fabricated in a 0.35µm, 3.3V SOI CMOS process. This work summarizes these designs and characterizes the measured performance. Simulations supplement the measurements where applicable. The DPLL was found to reach a locked state under a limited...
    Resource Type:
    Masters Thesis
    Full Text:
    presented on July 21, 2006. Title: Characterization of a Digital Phase Locked Loop and a Stochastic

  • Design of a low jitter digital PLL with low input frequency

    Creator:
    Jung, Seokmin
    Abstract:
    Complex digital circuits such as microprocessors typically require support circuitry that has traditionally been realized using analog or mixed-signal macros. PLL circuits are used in many integrated applications such as frequency synthesizers and inter-chip communication interfaces. As process technologies advance and grow in complexity, the challenge of maintaining required analog...
    Resource Type:
    Masters Thesis
    Full Text:
    of such a support circuit is the phase-locked loop (PLL). PLL circuits are traditionally used in

  • Model and design of cmos phase-locked loop

    Creator:
    Shum, Daniel K.
    Abstract:
    This thesis will examine the model and design technique of a self-contained analog CMOS Phase-Locked Loop. This system has an adaptable filter and demodulator for an oscillating frequency of up to 1000 KHz and it is programmable by means of an external resistor and capacitor. The first topic to be...
    Resource Type:
    Masters Thesis
    Full Text:
    Model and design of cmos phase-locked loop AN ABSTRACT

  • Small sample, low-temperature calorimetry

    Creator:
    Wolochuk, Lee
    Abstract:
    A calorimeter capable of measuring the heat capacity of 1 mg size samples from 4.2 to greater than 100 K has been designed, constructed, and tested. The sample is bonded to the end of a 0.002 inch diameter, 0.5 cm long chromel-constantan thermocouple (type E) and heated optically with a...
    Resource Type:
    Masters Thesis
    Full Text:
    design is 5 simple and allows for quick and easy construction. A third design uses an optical source

  • Design and manufacturing study of hydroelectric turbines using recycled and natural fiber composites

    Creator:
    Whitehead, Marc
    Abstract:
    The objective of this project is to demonstrate the feasibility fiber-reinforced turbine components through a design and manufacturing study. The motivation for using composites is to reduce weight and simplify manufacturing especially at high production volumes. In addition, natural fiber composites are implemented for applicable components to reduce environmental impact....
    Resource Type:
    Masters Thesis
    Full Text:
    of Master of Science in Mechanical Engineering presented on June 18, 2013. Title: Design and

  • Thermal hydraulic and fuel performance analysis for innovative small light water reactor using VIPRE-01 and FRAPCON-3

    Creator:
    Mai, Anh T.
    Abstract:
    The Multi-Application Small Light Water Reactor (MASLWR) is a small natural circulation pressurized light water reactor design that was developed by Oregon State University (OSU) and Idaho National Engineering and Environmental Laboratory (INEEL) under the Nuclear Energy Research Initiative (NERI) program to address the growing demand for energy and electricity....
    Resource Type:
    Masters Thesis
    Full Text:
    maintenance, optimization of core design, and reduction in operation, fuel, construction and maintenance

  • Top-down scaling analysis of the integral reactor vessel test facility

    Creator:
    Graves, Joshua D.
    Abstract:
    Oregon State University has conducted research in collaboration with TerraPower, LLC, to perform a top-down scaling analysis of an integrated test facility. The goal of this facility is to simulate transient and quasi-steady phenomena at a reduced scale, including steady-state operation, pump coastdown, natural circulation, reactor head heat transfer, and...
    Resource Type:
    Masters Thesis
    Full Text:
    constructed. The dates of construction and shutdown should be noted, as it indicates limited development of

  • Development test suite for FPGA TekBot learning platform

    Creator:
    Lai, Gerald
    Abstract:
    As the Tekbots program expands into senior and graduate level classes at Oregon State University, so does the need arise for more complex learning platforms. These complex hardware platforms cannot be adequately tested in a manufacturing environment as we have done previously. Also, due to their complexity, these platforms require...
    Resource Type:
    Masters Thesis
    Full Text:
    established design flow processes often found in the engineering industry. Crippled simulators and stripped

  • Light-frame versus timber frame : a study in quantifying the differences

    Creator:
    Malone, Brian P.
    Abstract:
    The objective of this study was to compare light wood framing and traditional timber framing quantitatively through environmental impact assessment and load path analysis. This research was inspired by a traditional timber frame structure constructed in Vermont in 2011, and the design of structures considered within reflect the general characteristics...
    Resource Type:
    Masters Thesis
    Full Text:
    traditional timber frame structure constructed in Vermont in 2011, and the design of structures considered

  • A numerical study of the thermal performance for surface mounted and through-hole mounted integrated circuits

    Creator:
    Wang, Jyi-Ren
    Resource Type:
    Masters Thesis
    Full Text:
    increased reliability in overall package thermal design, both internal and external 19 package thermal