With the growing demand for portable/consumer electronics, such as digital
audio/video (AV), the downscaling of device dimensions, which enables the
integration of an increasing number of transistors in a single chip, is mandatory.
This trend also continuously pushes the power supply voltage down to reduce the
power consumption and improve...
The resolution of analog-to-digital converters can be distinguished as absolute resolution, or average resolution. This study reviews average resolution enhancement techniques and proposes a method which is particularly applicable as a low-cost modification to a high-speed waveform acquisition system. This method uses oversampling combined with computationally simple digital filtering to...
This thesis describes the development of a flash analog-to-digital converter based on
current-mode technique. The advantages of current -mode technique are higher speed,
smaller chip area, and simple division of reference current based on current mirror. A
current-mode comparator is designed consisting of a cascode current mirror and a
current...
This thesis presents the design of a 10 bit Analog to
Digital Converter which consists of a 6 bit flash followed
by a 4 bit pipeline architecture. The total system is
described and the 4 bit pipeline is implemented on a bipolar
process.
The objective of this research is to...
In an industrial and consumer electronic marketplace that is increasingly demanding greater real-world interactivity in portable and distributed devices, analog to digital converter efficiency and performance is being carefully examined. The successive approximation (SAR) analog to digital converter (ADC) architecture has become popular for its high efficiency at mid-speed and...
A radix-based calibration technique was previously proposed with a two-stage algorithmic analog-to-digital converter (ADC). The objective of this work is to verify the capability of radix-based calibration for a true multi-stage ADC. In order to prove the idea, a single bit-per-stage, 20-stage pipelined ADC is designed in a 0.35-μm CMOS...
Utilizing a two-capacitor topology, the digital implementation of an audio-band successive-approximation analog-to-digital converter (ADC) is explored in the context of mismatch-shaping where the mismatch estimates are accurate to the first order. A second-order Δ∑ loop was found to be effective in system simulations given a 0.1% capacitor mismatch. Spectral analysis...
Two aspects of ADC system performance are addressed in this work. First, the combination of the ADC and its associated reference are co-designed for an energy constrained remote sensing system. Second, sampling linearity is mathematically analyzed as a function of frequency to provide enhanced understanding into an ADC's requisite sampling...
As advanced wired and wireless communication systems attempt to achieve higher performance, the demand for high resolution and wide signal bandwidth in their associated ADCs is strongly increased. Recently, time-domain quantization has drawn attention from its scalability in deep submicron CMOS processes. Furthermore, there are several interesting aspects of time-domain...
Analog to digital converters (ADCs) are a critical part of communication between the physical world and the increasingly digital systems humans use every day. ADCs have inherent non-idealities that degrade performance. Nonlinearity is one of the most prevalent non-idealities that designers face. While calibration methods for nonlinearity exist in the...