Most specifications for ready-mix concrete (RMC) limit mixing time to 90 minutes and/or truck drum revolution counts (DRC) to 300 before discharge. These specifications have been in place for many years with the objective of ensuring the quality and performance of the finished concrete product. However, limited research has been...
This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively.
The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
The research presented in this thesis assessed the use of high strength steel (HSS) reinforcement for use in reinforced concrete (RC) bridge columns. HSS is not currently allowed in reinforced concrete bridge columns due to a lack of information on the material characteristics and performance information when used in RC...
Successive approximation register analog-to-digital converters (SAR ADCs) have been widely used for medium-speed, medium-resolution applications due to their excellent power efficiency and digital compatibility. Recently, SAR ADCs are also penetrating into the applications which have been earlier dominated by delta-sigma ADCs and pipeline ADCs. However, the resolution of SAR ADCs...
Intuitively, it seems as though natural language processing tasks might benefit from explicit representations of the syntactic and semantic properties of text. Ontonotes is a dataset which attempts to annotate texts, to represent as much as possible of the meaning of the text explicitly within the annotation. Many tools exist...
As computation power continues to grow, the demand for data transfer bandwidth is also rising. This is reflected in the increasing data-rate of high-speed links. However, the increase in data-rate is sustainable only if the I/O energy efficiency improves as well. This dissertation explores several techniques to enable high-speed links...
Incremental ADCs (IADCs) have found wide applications in sensor interface circuitry since, compared to ∆Σ ADCs, they provide low-latency high-accuracy conversion and easy multiplexing among multiple channels. On the other hand, continuous-time ∆Σ ADCs (CTDSM) have been receiving more and more attention as a power-efficient solution in targeting medium to...
IC designers are continuously facing the challenges from reduced CMOS feature sizes and supply voltages. ADCs that deliver satisfactory resolutions/speeds while utilizing the state-of-the-art technologies to save power are in high demand. The analog circuits are more and more assisted by various digital calibration techniques to get boosted performances. This...
As more features are being integrated into mobile platforms, the demand for
long battery life during standby mode has been increasing. Light load efficiency
becomes one of essential features in today's DC-DC converter. The most effective
method to improve light load efficiency is to operate the DC-DC converter under
pulse-frequency-modulation...
This dissertation presents an incremental analog-to-digital converter (ADC) with digital digital-to-analog converter (DAC) mismatch correction. A theoretical time-domain analysis technique was developed to predict the noise performance of the incremental ADC, and a new optimization technique was proposed to minimize the output noise.
In the calibration mode, the incremental ADC...