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  • Equalizer design for MDFE channels using nonlinear optimization

    Creator:
    Onu, Dan
    Abstract:
    Decision feedback equalization (DFE) is a sampled-data technique used for data recovery in digital communications channels. Multi-level decision feedback equalization (MDFE) has been developed for channels using the 2/3(1,7) RLL code. The optimum detector for a digital communication channel affected by ISI and noise consists of a matched filter, followed...
    Resource Type:
    Masters Thesis
    Full Text:
    the APF, and the type and corner frequency of the LPF. A symbolic approach to the equalizer design

  • Design of high-speed low-power analog CMOS decision feedback equalizers

    Creator:
    Su, Wenjun
    Abstract:
    Decision feedback equalizer (DFE) is an effective method to remove inter-symbol interference (ISI) from a disk-drive read channel. Analog IC implementations of DFE potentially offers higher speed, smaller die area, and lower power consumption when compared to their digital counterparts. Most of the available DFE equalizers were realized by using...
    Resource Type:
    Masters Thesis
    Full Text:
    of Science in Electrical and Computer Engineerin presented on July 8th. 1996. Title: Design Of High

  • Design of high-speed adaptive parallel multi-level decision feedback equalizer

    Creator:
    Xiang, Yihai
    Abstract:
    Multi-level decision feedback equalization (MDFE) is an effective technique to remove inter-symbol interference (ISI) from disk readback signals, which uses the simple architecture of decision feedback equalization. Parallelism which doubles the symbol rate can be realized by setting the first tap of the feedback filter to zero. A mixed-signal implementation...
    Resource Type:
    Masters Thesis
    Full Text:
    Electrical and Computer Engineering presented on Feb. 26th, 1997. Title: Design of High-Speed Adaptive

  • A fast carry binary adder

    Creator:
    Bernhardt, Donn Eugene
    Abstract:
    This thesis describes the adder to be used with the Galaxy computer, which is to be constructed at Oregon State University. The need for faster, more reliable adders is discussed along with previous adder designs related to the Galaxy Fast Carry Adder. Both the logical design and circuit design of...
    Resource Type:
    Masters Thesis
    Full Text:
    the logical design and circuit design of the Galaxy Fast Carry Adder are discussed. Operating speed

  • A feasibility study on the use of arithmetic-memory registers in the design of digital computer systems

    Creator:
    Frank, Rudolph Joseph
    Abstract:
    The concept of combining arithmetic and memory capability on a single semiconductor chip has become practical from a system's viewpoint through the decreased cost of semiconductor memories and high circuit densities achieved through large scale integration. This paper describes a model for studying the feasibility of such systems. An arithmetic-memory...
    Resource Type:
    Dissertation
    Full Text:
    described. The state model proved to be a useful technique in the design of the system. Cost estimates and

  • The logical design of the NEBULA computer

    Creator:
    Boles, John Amos
    Abstract:
    Research in digital computers takes two paths: one uses the computer as a tool to reach certain objectives; on the other, the computer itself is the object of research. The NEBULA computer was built with the latter in mind. The system design and logical design are described here in detail....
    Resource Type:
    Dissertation

  • Design techniques for clocking high performance signaling systems

    Creator:
    Hanumolu, Pavan Kumar
    Abstract:
    Scaling of CMOS technology has progressed relentlessly for the past several decades. In order for this unprecedented scaling to benefit the performance of large digital systems, the communication bandwidth between integrated circuits (ICs) must scale accordingly. However, interconnect technology does not scale as aggressively, making communication between chips the major...
    Resource Type:
    Dissertation
    Full Text:
    being 3000 miles away and generously shared his vast knowledge on links design. Gu masterfully

  • Wideband discrete-time delta-sigma analog-to-digital converters with shifted loop delays

    Creator:
    Meng, Xin
    Abstract:
    Low-distortion architecture is widely used in wideband discrete-time switched-capacitor delta-sigma ADC design. However, it suffers from the power-hungry active adder and critical timing for quantization and dynamic element matching (DEM). To solve this problem, this dissertation presents a delta-sigma modulator architecture with shifted loop delays. In this project, shifted loop...
    Resource Type:
    Dissertation
    Full Text:
    Corporation (SRC), the Center for Design of Analog and Digital Integrated Circuits (CDIDIC), Texas

  • Ring amplification for switched capacitor circuits

    Creator:
    Hershberg, Benjamin Poris
    Abstract:
    A comprehensive and scalable solution for high-performance switched capacitor amplification is presented. Central to this discussion is the concept of ring amplification. A ring amplifier is a small modular amplifier derived from a ring oscillator that naturally embodies all the essential elements of scalability. It can amplify with accurate rail-to-rail...
    Resource Type:
    Dissertation
    Full Text:
    presented which explore the practical implementation options and design considerations relevant to ring

  • A study of basic building blocks of analog-to-digital delta-sigma modulators

    Creator:
    Guo, Yuhua
    Abstract:
    In this thesis, a novel Direct-Charge-Transfer (DCT) integrator structure is proposed, which can settle much faster than regular switch-capacitor integrators. A new Spread-Spectrum Dynamic Element Matching (SS-DEM) algorithm is also introduced, which can effectively spread or shape the nonlinearity error of multi-bit DAC in the feedback path, thus improve the...
    Resource Type:
    Masters Thesis
    Full Text:
    beginning of my research in school to the end of my study. And very happy to design a chip together. What

  • Development of zinc tin oxide-based transparent thin-film transistors

    Creator:
    Chiang, Hai Q.
    Abstract:
    The focus of this thesis involves development of highly transparent, n-channel, accumulation- mode thin-film transistors employing a zinc tin oxide (ZTO) channel layer. ZTO-based transparent thin-film transistors (TTFTs) show improved device performance compared to ZnO-based TTFTs. An estimated peak effective mobility for these devices as high as ~100 cm² V⁻¹sec⁻¹...
    Resource Type:
    Masters Thesis
    Full Text:
    polycrys- talline TFT device models with the intention of guiding the design and optimization of future

  • High-performance delta-sigma analog-to-digital converters

    Creator:
    da Silva, Jose Barreiro
    Abstract:
    Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However,...
    Resource Type:
    Dissertation
    Full Text:
    . Temes. I benefited from his extensive knowledge in circuit design, invaluable teaching and research

  • Fast opamp-free delta sigma modulator

    Creator:
    Thomas, Daniel E.
    Abstract:
    Switched-capacitor (SC) circuits are commonly used for analog signal processing because they can be used to realize precision filters and data converters on an integrated circuit (IC). However, for high speed applications SC circuit operating speeds are limited by the internally-compensated opamps found in SC integrators, a common building block...
    Resource Type:
    Masters Thesis
    Full Text:
    design is based on MATLAB and SpectreS simulations. Redacted for Privacy ©Copyright by Daniel E

  • Design of low OSR, high precision analog-to-digital converters

    Creator:
    Rajaee, Omid
    Abstract:
    Advances in electronic systems have lead to the demand for high resolution, high bandwidth Analog-to-Digital Converters (ADCs). Oversampled ADCs are well- known for high accuracy applications since they benefit from noise shaping and they usually do not need highly accurate components. However, as a consequence of oversampling, they have limited...
    Resource Type:
    Dissertation
    Full Text:
    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4 DESIGN AND APPLICATION OF A NOISE-SHAPED TWO-STEP QUANTIZER

  • High efficiency delta-sigma modulation data converters

    Creator:
    Lee, Kyehyung
    Abstract:
    Enabled by continued device scaling in CMOS technology, more and more functions that were previously realized in separate chips are getting integrated on a single chip nowadays. Integration on silicon has opened the door to new portable wireless applications, and initiated a widespread use of these devices in our common...
    Resource Type:
    Dissertation
    Full Text:
    support of my initial research at OSU. He allowed me enough time to learn analog circuit design and

  • A survey on continuous-time modulators : theory, designs and implementations

    Creator:
    Gao, Xiaoran
    Abstract:
    Recently, delta-sigma modulation has become a widely applied technique for high-performance analog-to-digital conversion of narrow-band signals. Most of the early designs used discrete-time structure for good accuracy and good linearity. The transfer functions are independent of the clock frequency. However, high unity-gain bandwidths of the opamps are required to satisfy...
    Resource Type:
    Masters Thesis
    Full Text:
    problems in the design of CT AE ADCs are analyzed and solutions to them are described. The theory, design

  • Efficient power conversion interface circuits for energy harvesting applications

    Creator:
    Le, Triet T.
    Abstract:
    Harvesting energy from the environment for powering micro-power devices have been increasing in popularity. These types of devices can be used in embedded applications or in sensor networks where battery replacement is impractical. In this dissertation, different methods of energy harvesting from the environment are explored as alternative sources of...
    Resource Type:
    Dissertation
    Full Text:
    degree of Doctor of Philosophy in Electrical and Computer Engineering presented on February 19, 2008

  • A wideband low-power continuous-time delta-sigma modulator for next generation wireless applications

    Creator:
    Chen, Xuefeng
    Abstract:
    Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are widely used in wireless transceivers. Recently, continuous-time (CT) ΔΣ ADCs gain growing interest in wireless applications for their lower power consumption and wider input bandwidth as compared with the discrete-time (DT) counterparts. In this thesis, a wideband low-power CT ΔΣ modulator for next generation...
    Resource Type:
    Dissertation
    Full Text:
    greatly benefited from his deep intuition and extensive knowledge of system and circuit design, from his

  • Design of a 14-bit continuous-time Delta-Sigma A/D modulator with 2.5MHz signal bandwidth

    Creator:
    Li, Zhimin
    Abstract:
    In recent years, there has been growing interest in both industry and academia to use continuous-time (CT) Δ-Σ A/D converters for wideband wireless and wireline communication applications. So far no reported CT Δ-Σ A/D modulator achieves 14-bit or higher dynamic range (DR) with more than 2MHz signal bandwidth (equivalently 4MS/s)....
    Resource Type:
    Dissertation
    Full Text:
    and Computer Engineering presented on January 27, 2006. Title: Design of a 14-bit Continuous-Time

  • Design of GaAs monolithically integrated optical receiver amplifier

    Creator:
    Ju, Shu-ing
    Resource Type:
    Masters Thesis
    Full Text:
    GHz bandwidth, and 5.03 pA/117-1Z input equivalent thermal noise current at 100 MHz. Design of