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  • Efficient content distribution on source constraint networks: peer communication

    Creator:
    Kamath, Rohit Vinodanand
    Abstract:
    Popular applications such as P2P file sharing, multiplayer gaming, videoconferencing, etc. rely on the efficiency of content distribution from a single source to multiple receivers. Most users of these applications are on the widely prevalent source constraint networks such as the Digital Subscriber Line (DSL) and wireless networks. Overlay multicast...
    Resource Type:
    Masters Thesis
    Full Text:
    of Science in Computer Science presented on June 1, 2006. Title: Efficient Content Distribution on

  • Node and topology management for content distribution in source constraint networks

    Creator:
    Kolazhi, Krishnan
    Abstract:
    As broadband Internet becomes widely available, Peer-to-Peer (P2P) applications over the Internet are becoming increasingly popular. Such an example is a video multicast application in which, one source streams a video to a large number of destination nodes through an overlay multicast tree consisting of peers. These overlay multicast-based applications,...
    Resource Type:
    Masters Thesis
    Full Text:
    Master of Science in Computer Science presented on June 5, 2006. Title: Node and Topology Management

  • Efficient P2P media dissemination with forward error correction

    Creator:
    Do, Phuoc
    Abstract:
    Media application on the internet has become more and more popular as the bandwidth of the network links increase. The bottleneck of the existing media systems is no longer the link bandwidth at user’s end, but the server’s ability to handle streaming requests. These existing streaming systems do not scale...
    Resource Type:
    Honors College Thesis
    Full Text:
    Honors Baccalaureate of Science in Computer Science (Honors Associate) Presented June 2, 2006

  • Single-level dynamic register caching architecture for high-performance superscalar processors

    Creator:
    Liebert, John A.
    Abstract:
    The amount of instruction level parallelism (ILP) that can be exploited depends greatly on the size of the instruction window and the number of in-flight instructions the processor can support. However, this requires a register file with a large set of physical registers for renaming and multiple ports to provide...
    Resource Type:
    Masters Thesis
    Full Text:
    and Computer Engineering presented on September 21, 2006. Title: Single-Level Dynamic Register

  • Investigating new design alternatives for a radix-2 modular multiplier kernal and I/O subsystem

    Creator:
    Chaitheerayanon, Akekalak
    Abstract:
    A main arithmetic operation for cryptographic systems is modular exponenti- ation. Exponentiation is computed by a long sequence of modular multiplications. Modular multiplication can be implemented in a general-purpose processor or a dedicated hardware, but dedicated hardware tends to be faster than a processor. Modular multiplication is a time-consuming operation,...
    Resource Type:
    Masters Thesis
    Full Text:
    for the degree of Master of Science in Electrical & Computer Engineering presented on December 16

  • The dynamic speculation and performance prediction of parallel loops

    Creator:
    Zier, David A.
    Abstract:
    General purpose computer systems have seen increased performance potential through the parallel processing capabilities of multicore processors. Yet this potential performance can only be attained through parallel applications, thus forcing software developers to rethink how everyday applications are designed. The most readily form of Thread Level Parallelism (TLP) within any...
    Resource Type:
    Dissertation
    Full Text:
    in Electrical and Computer Engineering presented on May 1, 2009. Title: The Dynamic Speculation and

  • Porting GCC to X32V architecture

    Creator:
    Venkatachalapathy, Savithri H.
    Abstract:
    This thesis work evaluates the need for a re-configurable cross compiler for the X32V processor architecture and discusses the process of developing a cross compiler for X32V. X32V is a new processor intended at the embedded applications domain whose instruction set is designed based on the widely used MIPS processor....
    Resource Type:
    Masters Thesis

  • Modeling and dynamics analysis of P2P networks based on evolutionary games

    Creator:
    Cho, Seungyun
    Abstract:
    Since free riders in P2P network reduce the system's performance, how to maintain and encourage the nodes' cooperation is an important aspect of P2P related research. In this thesis, a P2P system is modeled based on two games: stag hunt game and snowdrift game. To relate the model to the...
    Resource Type:
    Masters Thesis
    Full Text:
    AN ABSTRACT OF THE THESIS OF Seungyun Cho for the degree of Master of Science in Computer Science

  • Development and evaluation of X32V

    Creator:
    Hong, Jumnit
    Abstract:
    Embedded processors are utilized in many applications with considerable time spent developing and maintaining functionality and performance. Performance being a key factor in adding features such as video and audio to a product. Configurable processors, such as X32V, allow the addition of functionality and performance without large increases in design...
    Resource Type:
    Masters Thesis

  • Fast data replenishment in peer to peer networks

    Creator:
    Dhamodaran, Arul Nambi
    Abstract:
    Peer-to-Peer (P2P) based distributed storage systems have gain much popularity in recent years. These systems rely greatly on the data redundancy to be robust under network dynamics, i.e., the dynamics of peer entering and departing the network. Hence, it is important to implement mechanisms for maintaining a certain level of...
    Resource Type:
    Masters Thesis
    Full Text:
    degree of Master of Science in Electrical and Computer Engineering presented on September 12, 2011