Index Catalog // ScholarsArchive@OSU

Methods for testing and evaluating cargo flooring for transport aircraft

Creator:: Forest Products Laboratory (U.S.) and Brokaw, M. P.
Abstract:: Information reviewed and reaffirmed March 1956. Original report published in April 1945.
Resource Type:: Technical Report
Full Text:: . (Details of the design of fixture and case are shown in figure 15.) Compressed air was passed into the bag

Development of a sandwich-type cargo floor for transport aircraft

Creator:: Forest Products Laboratory (U.S.) and Yolton, L. A.
Abstract:: Information reviewed and reaffirmed March 1956. Original report published October 1947.
Resource Type:: Technical Report
Full Text:: tests were made in accordance with methods specified for evaluation of this mate- rial and described in

Summary of the results of tests of cargo flooring for aircraft (A through U)

Creator:: Johnson, L. F., Liska, J. A., and Forest Products Laboratory (U.S.)
Abstract:: Information reviewed and reaffirmed March 1956.
Resource Type:: Technical Report
Full Text:: materials to the loads imposed and over-all evaluation of the relative effectiveness of the several types o

Technique used in tracing the Lindbergh kidnapping ladder

Creator:: Forest Products Laboratory (U.S.)
Abstract:: Reissued September 1958. Published in the American Journal of Police Science, incorporated in the Journal of Criminal Law and Criminology, vol. 27 no. 5, 1937.
Resource Type:: Technical Report
Full Text:: -1- Agriculture-Madison 3. It showed poor design and workmanship and indicated that the man who

Model and design of cmos phase-locked loop

Creator:: Shum, Daniel K.
Abstract:: This thesis will examine the model and design technique of a self-contained analog CMOS Phase-Locked Loop. This system has an adaptable filter and demodulator for an oscillating frequency of up to 1000 KHz and it is programmable by means of an external resistor and capacitor. The first topic to be...
Resource Type:: Masters Thesis
Full Text:: Model and design of cmos phase-locked loop AN ABSTRACT

Small sample, low-temperature calorimetry

Creator:: Wolochuk, Lee
Abstract:: A calorimeter capable of measuring the heat capacity of 1 mg size samples from 4.2 to greater than 100 K has been designed, constructed, and tested. The sample is bonded to the end of a 0.002 inch diameter, 0.5 cm long chromel-constantan thermocouple (type E) and heated optically with a...
Resource Type:: Masters Thesis
Full Text:: design is 5 simple and allows for quick and easy construction. A third design uses an optical source

Evaluation of crumb rubber modified mixtures using performance based analyses

Creator:: Saxton, Robert W.
Abstract:: This study investigated the laboratory performance of crumb rubber modified mixtures compared to a standard bituminous mixture using performance based test procedures. This study was part of an asphalt resurfacing program for the Seattle Washington area. Laboratory analyses were used to estimate the long term pavement performance of these mixtures...
Resource Type:: Masters Thesis
Full Text:: Engineering Department (SED). Cutting through all the speculation and rhetoric, this evaluation of CRM

A numerical study of the thermal performance for surface mounted and through-hole mounted integrated circuits

Creator:: Wang, Jyi-Ren
Resource Type:: Masters Thesis
Full Text:: increased reliability in overall package thermal design, both internal and external 19 package thermal

Characterization of a digital phase locked loop and a stochastic time to digital converter

Creator:: Geissenhainer, Erik D.
Abstract:: A digital phase locked loop (DPLL) and a statistical time-to-digital converter (STDC) were previously fabricated in a 0.35Âµm, 3.3V SOI CMOS process. This work summarizes these designs and characterizes the measured performance. Simulations supplement the measurements where applicable. The DPLL was found to reach a locked state under a limited...
Resource Type:: Masters Thesis
Full Text:: presented on July 21, 2006. Title: Characterization of a Digital Phase Locked Loop and a Stochastic

Design techniques for clocking high performance signaling systems

Creator:: Hanumolu, Pavan Kumar
Abstract:: Scaling of CMOS technology has progressed relentlessly for the past several decades. In order for this unprecedented scaling to benefit the performance of large digital systems, the communication bandwidth between integrated circuits (ICs) must scale accordingly. However, interconnect technology does not scale as aggressively, making communication between chips the major...
Resource Type:: Dissertation
Full Text:: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 3.16 Phase-locked loop that provides 8-phases. . . . . . . . . . . . . . . . . . . . . . . . 40

ScholarsArchive@OSU

Methods for testing and evaluating cargo flooring for transport aircraft

Development of a sandwich-type cargo floor for transport aircraft

Summary of the results of tests of cargo flooring for aircraft (A through U)

Technique used in tracing the Lindbergh kidnapping ladder

Model and design of cmos phase-locked loop

Small sample, low-temperature calorimetry

Evaluation of crumb rubber modified mixtures using performance based analyses

A numerical study of the thermal performance for surface mounted and through-hole mounted integrated circuits

Characterization of a digital phase locked loop and a stochastic time to digital converter

Design techniques for clocking high performance signaling systems

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