With the advancement of technology, submicron CMOSonly process is available now for
Application Specific Integrated Circuits (ASICs). The high integration leads to the need for
high pin counts. However voltage supply and ground bounce due to many output drivers
switching at the same time is becoming a major problem. In...
In this thesis the network analog method is used to analyze various planar multi-conductor structures in multilayered, lossy dielectric media. The method is based on an efficient impedance network representation of the finite difference approximation of Laplace's equation for the electric potential. Using the network analog method, the transmission line...
A new CAD-oriented methodology for the full-wave broadband characterization of coupled microstrip structures for RF/microwave and high-speed digital circuits is presented. The characterization methodology is based on the finite difference time domain (FDTD) technique combined with a systematic extraction procedure using the normal mode approach and multiport network concepts. The...
The purpose of this research is to develop an approach to minimize makespan for assigning boards to production lines. Because of sequence-dependent setup issue, board assignment and component allocation have to be performed concurrently. An integrated methodology is proposed to obtain a solution of the two problems. The methodology consists...
Published March 1935. Facts and recommendations in this publication may no longer be valid. Please look for up-to-date information in the OSU Extension Catalog: http://extension.oregonstate.edu/catalog