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  • A VHDL description of speech recognition front-end

    Creator:
    Xiao, Xin
    Abstract:
    This thesis investigates an implementation of speech recognition front-end. It is an application specific integrated circuit (ASIC) solution. A Mel Cepstrum algorithm is implemented for the feature extraction. We present a new mixed split-radix and radix-2 Fast Fourier Transform (FFT) algorithm, which can effectively minimize the number of complex multiplications...
    Resource Type:
    Masters Thesis
    Full Text:
    of speech recognition front-end. It is an application specific integrated circuit (ASIC) solution. A

  • ASIC design and implementation of a parallel exponentiation algorithm using optimized scalable Montgomery multipliers

    Creator:
    Kurniawan, Budiyoso
    Abstract:
    Modular exponentiation and modular multiplication are the most used operations in current cryptographic systems. Some well-known cryptographic algorithms, such as RSA, Diffie-Hellman key exchange, and DSA, require modular exponentiation operations. This is performed with a series of modular multiplications to the extent of its exponent in a certain fashion depending...
    Resource Type:
    Masters Thesis
    Full Text:
    precision for which the design is used. A software application was developed in C to find the optimized