Power quality has become an important concern to both electric utilities and
end users due to the increased use of non-linear loads in modem power systems
over the past decade. Nonlinear loads inject harmonics into the power system and
thus may lead to poor power quality and lower power factor....
Digitally-programmable filters have been an ongoing research topic for a number of years. The first such filters were FIR transversal filters using Charge-Coupled Devices (CCD's) and IIR recursive filters using switched-capacitor (SC) techniques. Although both techniques achieve excellent results, they require non-standard and/or additional IC fabrication steps. Low substrate doping...
Due to advances in high-density low-cost VLSI and communication technology,
digital filtering and signal processing are being widely used for real-time signal processing
applications. Given the filter specification, choosing the best filter structure for a given
application is not a trivial task. The choice of a particular filter structure depends...
The objective of this thesis is to design a high speed digital FIR filter. The inputs of the
system come from a Delta-Sigma modulator. This FIR filter takes 1024 inputs,
multiplies them with their coefficients and adds the results. The main design task is to
take the input data, which...
A new structure for the implementation of bit/serial adaptive IIR filter is
presented. The bit level system consists of gated full adders for the arithmetic
unit and data latches for the data path. This approach allows recursive
operation of the IIR filter to be implemented without any global
interconnections, minimal...
Pulse Width Modulation (PWM) has been used extensively for motor control, DC-AC
converters, DC-DC converters and in audio applications. The conventional method of
generating a pulse width modulated signal involves generating an accurate sawtooth or triangle
wave using analog circuits. In CMOS, being analog circuit intensive puts extra constraints
on...
A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed
to implement the digital section of mixed-signal IC applications. This FSCL circuit technique
offers the advantage of low overlap current spikes during the switching transitions
of conventional CMOS gates. This overlap current spike has become one of...
A new approach to oversampled delta-sigma A/D converters ( AZ modulators ) is introduced, where a differential pseudo-Npath filter stage is used as a basic cell. In this band-pass application, the z to -zN transformation is employed to realize a RAM-type pseudo-2-path lossless integrator. The bandpass second-order and 4th-order delta-sigma...
The design of a 10-bit pipelined charge redistribution DAC employing MOSCAPs biased in their accumulation mode is presented in this thesis. A switched capacitor filter and output buffer have also been designed for the system. The effect of MOSCAP nonlinearity on the performance of the pipelined charge redistribution DAC has...