This thesis discusses an approach whereby
Microsoft's MS OS/2 is provided with a means of running
the Department of Defense's Transmission Control
Protocol/Internet Protocol (TCP/IP).
This is done by developing a Packet Protocol Device
Driver. This device driver complies with the Packet
Driver Specification from FTP Software Inc. and with...
Most general purpose protocols are found to suffer from
inefficiency in an Ethernet LAN environment when used for large
volume data transfer. This is especially true with the TCP/IP family
which was designed for a wide area network. This research work
presents a proof of this inefficiency and proposes a...
This thesis is concerned with the development of a unique
parallel sort-merge system suitable for implementation in VLSI.
Two new sorting subsystems, a high performance VLSI sorter and a
four-way merger, were also realized during the development
process. In addition, the analysis of several existing parallel sorting
architectures and algorithms...
With the advancement of technology, submicron CMOSonly process is available now for
Application Specific Integrated Circuits (ASICs). The high integration leads to the need for
high pin counts. However voltage supply and ground bounce due to many output drivers
switching at the same time is becoming a major problem. In...
The low thermal conductivity of gallium arsenide compared to silicon
results in self-heating effects in GaAs MESFETs that limit the electrical
performance of such devices for high power applications. To date, analytical
thermal models of self heating in GaAs MESFETs are based on the assumption
of a uniformly heated channel....
This thesis describes the analysis and comparison of Folded Source-Coupled
Logic (FSCL) with standard static CMOS, cascode voltage-switch logic and differential
split-level logic gates. The advantages of FSCL are low switching noise and
high operating speed. The effect of voltage and device scaling on these topologies is
evaluated in terms...
A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed
to implement the digital section of mixed-signal IC applications. This FSCL circuit technique
offers the advantage of low overlap current spikes during the switching transitions
of conventional CMOS gates. This overlap current spike has become one of...
We consider the parallelization of Monte Carlo algorithms for analyzing numerical models of charge transport used in semiconductor device physics. Parallel algorithms for the standard k-space Monte Carlo simulation of a three band model of bulk GaAs on hypercube multicomputers are first presented. This Monte Carlo model includes scattering due...
A study was undertaken to determine the prevalence of virus infection in lambs undergoing respiratory tract disease (RTD). The investigation was divided into three study groups and consisted of lambs which were 4 to 5 months of age. In the first group (N=200), paired serum samples were taken from lambs...