A special case of a parallel multiprocessor scheduling (MP) problem
is investigated. A set of jobs with a known process time and a.resource
requirement is scheduled on machines controlled by processors,and
the total changeover cost between jobs is to be minimized. Each processor
may control up to two machines and...
Multiprocessor computers may eventually be the only method of
increasing computer throughout. One of the major problems with
multiprocessor computers is the interference or contention between
processors when accessing a shared resource. This work describes the
design, construction, and analysis of a prototype multiprocessor computer utilizing a replicated shared memory...
We will describe two known strategies for static processor
allocation in an n-cube multiprocessor, namely the buddy system
strategy and the gray code strategy, and then propose a new strategy
that outperforms the first by (n-k+1) and the second by (n-k+1)/2 in
cube recognition. Furthermore, our strategy is suitable for...
For many years, the von Neumann bottleneck has imposed speed limits on the execution of a program. Because of their sequential nature, von Neumann computers can only execute a single instruction at a time. Instructions that are side-effect free and can be executed in parallel must wait. In an effort...
The system in this thesis uses multiple Intel iSBC86/12A cards
connected to the Intel Multibus. The system was written using the Intel
language PLM86. The final result is a low level debug tool that
provides the user with the following capabilities: examine/change
memory, examine/change processor registers, load a user written...
The multimedia capabilities of computers have recently become the focus of computer developers due to the increasing demand for advanced computer graphics and new media capabilities, such as video conferencing, 3-D visualization, and animation. To support these multimedia capabilities, specialized graphics hardware, such as MPEG encoding/decoding card, 3-D graphics card,...
This thesis is an attempt to create a methodology to analyze the performance of parallel applications on a wide variety of platforms and programming environments. First we determined the monitoring functions required to collect traces for accurate representation of the parallel application. We used the Extended Large Grain Data Flow...
There appears to be a broad agreement that high-performance computers of the future will be
Massively Parallel Architectures (MPAs), where all processors are interconnected by a high-speed
network. One of the major problems with MPAs is the latency observed for remote operations. One
technique to hide this latency is multithreading....
The microprocessors will have more than a billion logic transistors on a single chip in the near future. Several alternatives have been suggested for obtaining highest performance with billion-transistor chips. To achieve the highest performance possible, an on-chip multiprocessor will become one promising alternative to the current superscalar microprocessor. It...
