High-accuracy and high-speed CMOS track-and-hold (T/H) or sample-and-hold (S/H) circuits are an important part of the analog-to-digital interface. The switched-capacitor (SC) circuits usually contain one or more op-amps whose dc offset, finite gain, finite bandwidth have a big impact on the accuracy of the track-and-hold circuit. Basic correlated double sampling...
It has been verified by theoretical analysis, circuit simulation and test that two
switch transistors in parallel in a simple sample and hold circuit can be achieve high speed
with low error voltage due to charge injection. The wide transistor provides low RC time
constant when it is closed and...
The advance of digital IC technology has been very fast, as shown by rapid development of DSP, digital communication and digital VLSI. Within electronic signal processing, analog-to-digital conversion is a key function, which converts the analog signal into digital form for further processing. Recently, low-voltage and low-power have become also...
This thesis describes design techniques for high-performance switched-capacitor
(SC) circuits, primarily for high-linearity low-noise SC circuits in the presence of
component imperfections, such as nonlinear op-amp voltage transfer characteristics,
capacitor nonlinearities as well as the finite op-amp dc gain and op-amp offset and noise.
Various correlated-double-sampling (CDS) schemes are discussed,...
Delta-sigma modulators are currently a very popular technique for making high-resolution
analog-to-digital and digital-to-analog converters (ADCs and DACs). Most
delta-sigma modulators in production today employ single-bit quantization because a 1-bit DAC is inherently linear, whereas a multi-bit DAC is not. Were it not for this drawback,
the use of multi-bit...
The precise measurement of a capacitance difference or ratio in a digital form is
very important for capacitive sensors, for CMOS process characterization as well as for the
realization of precise switched-capacitor data converters, amplifiers and other circuits
utilizing ratioed capacitors. This thesis introduces design techniques for on-chip capacitor