A tuning technique which tunes the continuous time filter very accurately is proposed in this thesis. This technique overcomes the problem of master slave mismatch, thus tuning the filter accurately. The mismatch minimization is done on power up on foreground while the background tuning is always operational. Once the mismatch...
The objective of this work is to explore the feasibility of replacing conventional op-amps with inverters in switched-capacitor (SC) circuits. In order to verify the idea, a low-pass filter (LPF) and a second-order delta-sigma (∆Σ) analog-todigital converter (ADC) are designed in the 0.5-m CMOS technology. The low-pass filter structure is...
This thesis proposes a novel technique for the design of pipelined and cyclic ADCs utilizing generalized radix gain stages. Several models have been proposed for the optimization of high performance pipelined ADCs by various researchers. This work builds upon them, using a simple but accurate model to estimate the optimal...