The purpose of this thesis is to explore methods which can reduce the power dissipation of a mobile system while decoding MPEG video. MPEG decoding is a microprocessor intensive process that makes heavy use of both the L1 and L2 caches as well as main memory. The heavy load placed...
This thesis presents a novel methodology that enables power efficient video decoding
in an embedded system based on MPSoC (Multiprocessor System on Chip). This
methodology is a physical combination of parallel processing which reduces power
consumption of processors by exploiting thread-level parallelism and Dynamic
Voltage Frequency Scaling (DVFS) that allows...