Multi-Gigahertz sampling rate Analog-to-Digital Converters (ADC) with 5-8 bits resolution are used in many signal communication applications. Unfortunately, the performance of the high speed ADC is limited by the timing accuracy of the sampling clock. A small sampling uncertainty can cause a large error in the sampled voltage and result...
Current multi-gigahertz ADC performance is
limited by the sampling clock timing jitter. This paper describes
the effects of clock transition time on the spurious-free dynamic
range (SFDR) of a CMOS T/H circuit. A signal-dependent
nonlinearity model is first introduced that provides insight on the
effect of finite clock transition time,...