A test fixture and deembedding procedure for high-frequency substrate characterization Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/2514np66k

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  • At frequencies exceeding 1-2 GHz, the substrate network models used in substrate coupling simulation must account for the reactive nature of the substrate. Unlike at low frequencies, where the purely resistive substrate models can be validated through DC resistance measurements, these high-frequency models, comprising reactive components, must be validated through high-frequency network analyzer measurements. Accurately obtaining such measurements requires careful design of both a measurement test fixture as well as a measurement deembedding procedure. A test fixture has been fabricated and a deembedding procedure designed to enable high-frequency (up to 20 GHz) network parameter measurements of a silicon substrate. A test chip, containing a variety of substrate test structures has been fabricated in a 0.35 μm CMOS process on a heavily-doped substrate. The design of the test fixture, test chip, and deembedding procedure has been validated through extensive simulations in HFSS. Measurements have been made on the test chips mounted in the test fixture. The performance of the test fixture and measurement deembedding procedure has been evaluated, and suggestions for future improvements in this area are presented.
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  • description.provenance : Approved for entry into archive by Julie Kurtz(julie.kurtz@oregonstate.edu) on 2005-09-02T17:39:29Z (GMT) No. of bitstreams: 1 thesis.pdf: 1364410 bytes, checksum: 13e53a68e3850ed986b28f608b5f98a7 (MD5)
  • description.provenance : Made available in DSpace on 2005-09-06T20:22:51Z (GMT). No. of bitstreams: 1 thesis.pdf: 1364410 bytes, checksum: 13e53a68e3850ed986b28f608b5f98a7 (MD5)
  • description.provenance : Submitted by Kyle Webb (webb@eecs.oregonstate.edu) on 2005-08-22T21:34:26Z No. of bitstreams: 1 thesis.pdf: 1364410 bytes, checksum: 13e53a68e3850ed986b28f608b5f98a7 (MD5)

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