Low noise FSCL digital circuits for decimation filter Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/2j62s760x

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  • A new circuit technique called Folded Source Coupled Logic (FSCL) has been developed to implement the digital section of mixed-signal IC applications. This FSCL circuit technique offers the advantage of low overlap current spikes during the switching transitions of conventional CMOS gates. This overlap current spike has become one of the major obstacles in improving the accuracy and performance of mixed-signal IC applications. Using simple circuits, FSCL logic family can be interfaced with the existing CMOS family. Thus it can nearly eliminate the power noise issue in the mixed-signal IC design. In this thesis, design of a sinc3 decimation filter using the FSCL technique for a 2nd order delta-sigma modulator has been presented. Simulation results show that this particular decimation filter, using the newly developed FSCL technique, improves the performance of the mixed-signal system.
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  • File scanned at 300 ppi (Monochrome) using Capture Perfect 3.0.82 on a Canon DR-9080C in PDF format. CVista PdfCompressor 4.0 was used for pdf compression and textual OCR.
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  • description.provenance : Submitted by Kevin Martin (martikev@onid.orst.edu) on 2013-01-04T20:54:37Z No. of bitstreams: 1 WongManW1994.pdf: 1427020 bytes, checksum: 1d15b34deb4bab5ef238f51f0d8471d4 (MD5)
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2013-02-06T22:26:49Z (GMT) No. of bitstreams: 1 WongManW1994.pdf: 1426520 bytes, checksum: 30237749815ed8743e0c03309bf2e4e0 (MD5)

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