The operational transconductance amplifier (OTA) is a fundamental building block in analog and mixed-signal systems. This research describes a process-, voltage-, and temperature- (PVT) insensitive low-voltage tracking RC compensation scheme considered for two-stage CMOS OTAs, which cancels the pole due to the load capacitance using a Miller zero generated by the frequency compensation network. A low-voltage current source with no back-gate effect (a “k’ generator” or a peaking current source) is used to generate the bias currents for the OTA. This architecture implemented in a TSMC 180nm CMOS process, achieves a 2X power reduction compared to a widely-used active-RC compensation scheme. Also, a rail-to-rail input and output operational amplifier is designed in a 180nm process with a complementary input pair and a class-AB output stage.