Preliminary design of the RTAF command and control two-level parallel computing system Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/2z10wt84k

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  • This paper investigates the benefit of various parallel processing architectures for a Command and Control system for the Royal Thai Air Force. Parallel processing has been shown to be useful for air defense and air traffic control applications. Its advantages are examined within the constraint imposed by the available resources of a developing nation. Several alternative types of architecture including array parallel processing, pipeline processing, associative processing, multiprocessing, and computer network are examined and summarized. The consideration criteria are based on cost, performance, reliability and flexibility. A system architecture based on a generalized multiprocessor configuration is proposed. This system has a second level of parallelism within each processor by providing a number of independent functional logical and arithmetic units in the processing unit. It is modular in design and hence economical, adaptable, and expandable. Therefore, the basic system cost will be within the financial constraints. To obtain the optimum designed configuration and to find the limitations of the proposed model, the necessary system parameters such as processing units (P), memory modules (M), memory cycle time, rate of memory reference, are introduced. The memory conflicts (queue statistics) average utilization of a memory module (facility statistics), and other statistics parameters are measured by simulation. The relative system cost is evaluated and the system efficiency curve is plotted against the corresponding memory module utilization to determine the optimum operating configuration. To illustrate command and control execution, a typical program which solves N simultaneous non-linear equations in N unknowns by the Newton-Raphson iterative procedure is selected as an example. The algorithm of Ramamoothy and Gonzalez is applied for recognizing the parallel processable tasks of the selected FORTRAN program as the system compiler and recognizer. The connectivity matrices corresponding to the analyzed program are illustrated and the parallel processable task tables are constructed. As an example of second level parallel processing, the necessary PU instructions are proposed and their corresponding execution time are defined. A number of FORTRAN statements related to the selected program are assumed to be executed by one of the processing units (PU) in the system. A set of machine instructions equivalent to those FORTRAN statements are derived and a long hand simulation performed. The time of both concurrent execution and sequential execution are computer and compared. A number of intermediate ratios of concurrent execution time to the corresponding sequential execution time for the simulated program are computed and plotted as a function of the number of executed machine instructions.
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