Design of CMOS switched-current filters Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/4j03d183p

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  • The design and implementation of Switched-Current (SI) ladder filters is described. SI filters require only a standard digital CMOS process and the power supply voltage requirement is low. SI circuits also can be potentially operated at higher frequencies than Switched-Capacitor (SC) filters due to the low-impedance wideband nodes of the current mirrors. A simple method has been developed to design SI ladder and biquadratic fllters with maximum dynamic range that leverages the well-established design methodologies of SC filters. A standard digital 2-micron n-well CMOS process has been used to implement two high-order ladder filters and two biquadratic filters. Simulations accurately predict the measured results of the first integrated SI filters. The area and power dissipation are comparable to the switched-capacitor technique. Analysis of the factors that effect dynamic range in SI filters is presented. The factors that contribute to harmonic distortion in the current-mode circuits are characterized and the relationships to maximum signal size are established. Using measurements of the input-referred noise from SI filters, the dynamic range is obtained.
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  • File scanned at 300 ppi (Monochrome) using Capture Perfect 3.0 on a Canon DR-9050C in PDF format. CVista PdfCompressor 4.0 was used for pdf compression and textual OCR.
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2013-02-26T22:47:13Z (GMT) No. of bitstreams: 1 FiezTheresaS1991.pdf: 2979162 bytes, checksum: dec74406a943872e38e59fe0c75e1ca5 (MD5)
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2013-02-19T20:58:18Z (GMT) No. of bitstreams: 1 FiezTheresaS1991.pdf: 2979162 bytes, checksum: dec74406a943872e38e59fe0c75e1ca5 (MD5)
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