Ground tap placement and sizing to minimize substrate noise coupling in RF LNAs Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/5425kf92p

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  • The substrate noise injected by a stepped buffer circuit into two single-ended 1.5GHz low noise amplifiers is examined for a heavily doped 0.25µm CMOS process. The difference in the LNA noise rejection is characterized as a function of the size and placement of substrate contacts. The use of a resistive model for the substrate, and SPICE models for the interconnect and passive device parasitics give good correlation between the measured and simulated results. A reduction of 2-12dB is achieved for the intermodulation products, with larger substrate contacts. It is shown that large ground taps placed in close proximity to the input transistor are most effective in suppressing the IM levels.A detailed examination of the noise injection mechanisms in a stepped buffer shows that the injected noise is a strong function of the layout of the buffer interconnects. Proposed methods to reduce the injected noise result in improvements of 9-11dB.
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  • description.provenance : Submitted by Arathi Sundaresan (sundarea@onid.orst.edu) on 2006-08-07T15:22:08Z No. of bitstreams: 1 Thesis report.pdf: 991980 bytes, checksum: eba04df7a20295a87e83e952f53cd6eb (MD5)
  • description.provenance : Approved for entry into archive by Julie Kurtz(julie.kurtz@oregonstate.edu) on 2006-08-15T16:53:15Z (GMT) No. of bitstreams: 1 Thesis report.pdf: 991980 bytes, checksum: eba04df7a20295a87e83e952f53cd6eb (MD5)
  • description.provenance : Made available in DSpace on 2006-08-21T19:57:39Z (GMT). No. of bitstreams: 1 Thesis report.pdf: 991980 bytes, checksum: eba04df7a20295a87e83e952f53cd6eb (MD5)

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