Graduate Thesis Or Dissertation
 

Power amplifier design in digital CMOS processes

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/6m311s013

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  • The ability to integrate designs from board level, multi-chip modules to single process solutions is highly attractive in today's PC multimedia industry. Saving board area and chip count will decrease the production cost of personal computing hardware and increase profitability. The ability to integrate analog circuit capability and it's reference circuitry with DSP cores and processors creates a highly profitable line of products. This possible line of products warrants research and development of the ability to produce high quality analog functionality in digital processes. Techniques for analog design in digital processes are valuable pieces of intellectual property. Digital processes rarely include analog functionality and analog processes' feature sizes tend to be several generations behind those of the digital. Personal computing is a driving force behind today's integrated circuit market. The primary functionality of the PC utilizes mainly digital products. The most prevalent products are processors closely followed by Digital Signal Processing cores. In these cases analog functionality has been implemented at the board level in costly analog chip packages such as sound cards and reference systems. The ability to integrate all of the analog and digital functionality on a single die, even at a lower performance level is profitable and attractive option for today's PC multimedia industry. Three amplifiers have been designed and tested in a digital CMOS process. The goal of this effort is to provide some insight into the feasibility of precision analog functionality in digital processes. Each amplifier has been tested with three types of resistors and three types of capacitors readily available in digital processes. The results are tabulated and some insights into the design theory are presented. And finally some insight into amplifier topological choices when only specific passive components are available are shared.
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