A fast-settling folded-cascode CMOS operational amplifier Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/7h149s007

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  • A fast-settling CMOS operational amplifier using the folded-cascode topology has been designed. The design is based on a theory developed by Yang et al for the optimum settling time of two-pole systems for switched-capacitor applications. The theory states that the two poles are separated by a given factor in order to obtain a minimum small-signal settling time. The design is achieved by performing a complete small-signal analysis to gain a better understanding of the frequency and time responses of the folded-cascode op-amp. SPICE simulation results are in good agreement with the theoretical predictions.
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  • File scanned at 300 ppi (Monochrome) using ScandAll PRO 1.8.1 on a Fi-6770A in PDF format. CVista PdfCompressor 5.0 was used for pdf compression and textual OCR.
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2013-05-29T19:08:21Z (GMT) No. of bitstreams: 1 AbuDayehMahmoudA1989.pdf: 362446 bytes, checksum: 3a714c477d8e93398a94bc8be635bb91 (MD5)
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2013-06-27T20:54:49Z (GMT) No. of bitstreams: 1 AbuDayehMahmoudA1989.pdf: 362446 bytes, checksum: 3a714c477d8e93398a94bc8be635bb91 (MD5)

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