Graduate Thesis Or Dissertation

 

An integrated analog multiplier circuit Público Deposited

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https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/9w032542d

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  • The exponential characteristic of the base-emitter Junction in bipolar transistors was used to make an accurate and fairly temperature independent multiplier. Using hybrid-pi transistor models and ECAP, a bandwidth of 350 MHz was predicted. Linearity is limited by emitter degeneration in the input differential stage rather than by the small errors in the actual multiplying stage. The multiplier was fabricated as a monolithic integrated circuit in the Tektronix integrated circuits laboratory. The prototype showed a bandwidth of 200 MHz, and a linearity of 2% over 50% of the dynamic range, when used as a variable gain amplifier.
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  • File scanned at 300 ppi (Monochrome, 8-bit Grayscale) using ScandAll PRO 1.8.1 on a Fi-6770A in PDF format. CVista PdfCompressor 4.0 was used for pdf compression and textual OCR.
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