Analysis of a tunnel-diode delay-line reflex memory cell Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/bg257h72r

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  • The operation of a tunnel-diode delay-line memory cell is examined in some detail, and a digital computer program which approximately simulates the operation of this memory cell is developed. The data from the computer simulation is compared with the available experimental data and found to agree very closely for clock frequencies up to 100 megahertz. The computer simulation should be accurate at higher frequencies, but limitations in the experimental system preclude the necessary verification. The simulation data, augmented by experimental data, is shown to be useful in answering questions concerning the relative resistance levels of the various components of the circuit, the most desirable tunnel-diode specifications, and the proper timing and termination of the pulses on the delay line. The computer simulation has in this way added to the previous understanding of the operation of the memory cell, and it has opened the door to further analysis of this and other related tunnel-diode circuits.
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  • File scanned at 300 ppi using ScandAll PRO 1.8.1 on a Fi-6670 in PDF format. CVista PdfCompressor 5.0 was used for pdf compression and textual OCR.
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