Contact resistance and stability assessment of oxide-based thin film transistors Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/br86b669d

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  • This thesis focuses on two aspects of oxide-based thin-film transistors (TFTs), contact resistance and instability assessment. First, determination of the contact resistance of indium tin oxide (ITO) on two wide-band gap semiconductors, zinc oxide (ZnO) and indium gallium oxide (IGO), is attempted and the effects of contact resistance on device performance is investigated. Both transistor and transfer length method (TLM) structures are used in the study and three material systems are employed: ZnO on SiO2, ZnO on aluminum titanium oxide (ATO), and IGO on SiO2. It is found that the measured resistance is not dominated by contact resistance effects. It is concluded that the device dimensions used in this study (i.e., gate lengths of 50 to 200 μm) are too large to yield an accurate estimate of the contact resistance, since it is so small. Second, a methodology for assessing the stability of oxide-based TFTs is developed and implemented. This methodology involves constant voltage stressing over a maximum duration of 105 s (i.e., ~ 28 hours) and periodic evaluation of drain current-drain voltage and drain current-gate voltage characteristics during the stability test. This stability assessment strategy is first applied to three semiconducting materials: ZnO, zinc indium oxide (ZIO), and IGO, using thermal silicon oxide as the gate dielectric. Similar trends are observed for these device types. Relatively stable devices are obtained after post-deposition annealing at a temperature of ~ 600 °C for ZnO and IGO TFTs, and ~ 400 °C for ZIO TFTs. The presence of instability in these devices, which is more pronounced at a lower annealing temperature, results in a positive shift in the turn-on voltage and clockwise hysteresis in the drain current-gate voltage transfer curve. Such an instability is attributed to electron trapping near the channel/insulator interface. The stability a ZnO TFT fabricated using a spin-coat synthesized aluminum phosphate (AlPO) as the gate dielectric is also investigated. The ZnO/AlPO TFT showed distinctively different stability trends. This device is observed to be very unstable with a negative shift in the turn-on voltage and counter-clockwise hysteresis in the drain current-gate voltage transfer curve. The mechanism for this instability is ascribed to insulator ion drift. It is shown that stable TFTs can be fabricated with oxide-based channel layers if a high quality insulator, such as thermal silicon dioxide, is available and if a post-deposition anneal at an elevated temperature is employed.
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  • description.provenance : Submitted by Celia Hung (celia.hung@gmail.com) on 2007-01-12T18:36:59Z No. of bitstreams: 1 CMHung_Thesis_v4.pdf: 4559355 bytes, checksum: 4bac57268e434d48ef97e1a291e894bc (MD5)
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  • description.provenance : Approved for entry into archive by Julie Kurtz(julie.kurtz@oregonstate.edu) on 2007-01-16T17:58:24Z (GMT) No. of bitstreams: 1 CMHung_Thesis_v4.pdf: 4559355 bytes, checksum: 4bac57268e434d48ef97e1a291e894bc (MD5)

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