A MOSCAP pipeline pseudo passive DAC Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/d504rp58n

Descriptions

Attribute NameValues
Creator
Abstract or Summary
  • The design of a 10-bit pipelined charge redistribution DAC employing MOSCAPs biased in their accumulation mode is presented in this thesis. A switched capacitor filter and output buffer have also been designed for the system. The effect of MOSCAP nonlinearity on the performance of the pipelined charge redistribution DAC has been analyzed. MOS capacitors and their models available for simulation have been discussed. In addition, the effect of more general capacitor nonlinearities on the performance of the DAC has been presented.
Resource Type
Date Available
Date Copyright
Date Issued
Degree Level
Degree Name
Degree Field
Degree Grantor
Commencement Year
Advisor
Committee Member
Academic Affiliation
Non-Academic Affiliation
Keyword
Subject
Rights Statement
Language
File Format
File Extent
  • 1260770 bytes
Replaces
Additional Information
  • description.provenance : Approved for entry into archive by Julie Kurtz(julie.kurtz@oregonstate.edu) on 2005-09-21T16:29:47Z (GMT) No. of bitstreams: 1 Thesis_pdf.pdf: 1260770 bytes, checksum: 768490dc767e5e866e271dc4da23f6ec (MD5)
  • description.provenance : Submitted by Prachee Behera (beherap@onid.orst.edu) on 2005-09-17 No. of bitstreams: 1 Thesis_pdf.pdf: 1260770 bytes, checksum: 768490dc767e5e866e271dc4da23f6ec (MD5)
  • description.provenance : Made available in DSpace on 2005-09-21T18:27:23Z (GMT). No. of bitstreams: 1 Thesis_pdf.pdf: 1260770 bytes, checksum: 768490dc767e5e866e271dc4da23f6ec (MD5)

Relationships

Parents:

This work has no parents.

Last modified

Downloadable Content

Download PDF

Items