A high-swing CMOS operational amplifier topology

Graduate Thesis Or Dissertation

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Citeable URL: https://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/d791sm603

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Attribute Name	Values
Creator	Yang, John Jian
Abstract	A circuit topology for high-swing, high-linearity CMOS operational amplifiers has been developed. The technique uses parallel-connected p- and n-channel input pairs to realize an input common-mode voltage range nearly equal to the total power supply voltage. High linearity is achieved by summing the DC bias and AC small-signal currents so that the small voltage gain is, to a first order, constant over the full common-mode voltage range. The technique has been applied to two-stage and cascode CMOS operational amplifiers.
Resource Type	Masters Thesis
Date Available	2013-06-12T17:33:06+00:00
Date Issued	1988-02-02
Degree Level	Master's
Degree Name	Master of Science (M.S.)
Degree Field	Electrical and Computer Engineering
Degree Grantor	Oregon State University
Commencement Year	1988
Advisor	Allstot, David J.
Committee Member	Amort, D. L. Love, A. H. Thipathi, V. K.
Academic Affiliation	Electrical and Computer Engineering
Non-Academic Affiliation	Oregon State University. Graduate School
权利声明	In Copyright
Publisher	Oregon State University
Peer Reviewed	No
Language	English [eng]
Digitization Specifications	File scanned at 300 ppi (Monochrome) using Capture Perfect 3.0.82 on a Canon DR-9080C in PDF format. CVista PdfCompressor 4.0 was used for pdf compression and textual OCR.
Replaces	http://hdl.handle.net/1957/39335

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