Synchronization in a CMOS technology Public Deposited

http://ir.library.oregonstate.edu/concern/graduate_thesis_or_dissertations/g732dc482

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  • The problem of synchronization arises in the interaction among digital systems not sharing a common clock reference. The reliability of synchronizers is related to metastable operation of bistable elements. Because of its subtle nature, the phenomenon until recently was not widely researched. However, the literature now contains a sound theoretical basis concerning the nature of metastability and its relationship to synchronization failure. Methods exist for construction of circuits with high synchronization reliability. This paper describes the performance of synchronizers constructed in an integrated CMOS technology. A discussion of the characteristics of CMOS circuits in metastable operation is given, with attention to various device capacitances. The effect of transient channel charging current is included. A high-performance CMOS realization is described and experimental measurements of the synchronization reliability are compared with predicted performance curves. A comparison to NMOS circuits is given.
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  • description.provenance : Submitted by Katy Davis (kdscannerosu@gmail.com) on 2013-08-05T18:10:56Z No. of bitstreams: 1 FlannaganStephenT1983.pdf: 923089 bytes, checksum: c6269790094733dfee0fe9d8fd56cbfd (MD5)
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  • description.provenance : Approved for entry into archive by Patricia Black(patricia.black@oregonstate.edu) on 2013-08-05T19:23:25Z (GMT) No. of bitstreams: 1 FlannaganStephenT1983.pdf: 923089 bytes, checksum: c6269790094733dfee0fe9d8fd56cbfd (MD5)
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